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Mile K. Stojcev: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Emina I. Milovanovic, Igor Z. Milovanovic, Mile K. Stojcev
    Matrix Inversion Algorithm for Linear Array Processor. [Citation Graph (0, 0)][DBLP]
    CONPAR, 1992, pp:367-372 [Conf]
  2. Mile K. Stojcev, Igor Z. Milovanovic, Emina I. Milovanovic, G. S. Jovanovic
    Real-Number Codes for Fault-Tolerant Matrix Inversion on Processor Arrays. [Citation Graph (0, 0)][DBLP]
    CONPAR, 1992, pp:821-822 [Conf]
  3. Mile K. Stojcev, Emina I. Milovanovic, Milan D. Mihajlovic, Igor Z. Milovanovic
    Parallel Algorithm for Inverting Tridiagonal Matrix on Linear Processor Array. [Citation Graph (0, 0)][DBLP]
    CONPAR, 1994, pp:229-240 [Conf]
  4. Emina I. Milovanovic, Igor Z. Milovanovic, Mile K. Stojcev, Milan D. Mihajlovic
    An Optimal Algorithm for Gaussian Elimination of Band Matrices on a MIMD System. [Citation Graph (0, 0)][DBLP]
    Computers and Artificial Intelligence, 1996, v:15, n:5, pp:- [Journal]
  5. Goran L. Djordjevic, Mile K. Stojcev
    An Interprocessor Communication Interface for Message Passing via Shared Memory Modules - Design and Performance. [Citation Graph (0, 0)][DBLP]
    Computers and Artificial Intelligence, 1996, v:15, n:1, pp:- [Journal]
  6. Igor Z. Milovanovic, Emina I. Milovanovic, Mile K. Stojcev
    An optimal algoPaulrajrithm for Gaussian elimination of band matrices on an MIMD computer. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1990, v:15, n:1-3, pp:133-145 [Journal]
  7. Mile K. Stojcev, Emina I. Milovanovic, Igor Z. Milovanovic
    An algorithm for multiplication of concatenated matrices. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1990, v:13, n:2, pp:211-223 [Journal]
  8. Emina I. Milovanovic, Igor Z. Milovanovic, Mile K. Stojcev
    Solving Tridiagonal Linear Systems on MIMD Computers. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 1994, v:4, n:, pp:53-64 [Journal]
  9. Mile K. Stojcev
    The Computer Engineering Handbook; Vojin Oklobdzija. CRC Press, Boca Raton, 2002. Hardcover, pp 1338, ISBN 0-8493-0885-2. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:7, pp:1151- [Journal]
  10. Mile K. Stojcev
    Memory Design Techniques for Low Energy Embedded Systems; Alberto Macii, Luca Benini, Massimo Poncino. Kluwer Academic Publishers, Boston, USA, 2002. Hard cover, pp 144 plus XI, ISBN 0-7923-7690-0. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:3, pp:513- [Journal]
  11. Mile K. Stojcev
    High Performance Memory Testing: Design Principles, Fault Modeling and Self-Test; R. Dean Adams, Kluwer Academic Publishers, Boston, 2003, Hardcover, pp 247, plus XIII, ISBN 1-4020-7255-4. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:5, pp:819- [Journal]
  12. Mile K. Stojcev
    A designer's guide to built-in self-test; Charles E. Stround. Kluwer Academic Publishers, Boston, 2002. Hardcover, pp 319, plus XVI, ISBN 1-4020-7050-0. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:3, pp:514-515 [Journal]
  13. Mile K. Stojcev
    System Design with System C; Thorsten Grotker, Stan Liao, Grant Martin, Stuart Swan. Kluwer Academic Publishers, Boston, 2002. Hardcover, pp 217, plus X, ISBN 1-4020-7027-1. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:4, pp:683-684 [Journal]
  14. Mile K. Stojcev
    Semiconductor Memories: Technologies, Testing and Reliability; Ashok K. Sharma. IEEE Press and Wiley Interscience, New York, 1997. Hardcover, pp 462, plus XII, ISBN 0-7803-1000-4. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:3, pp:515- [Journal]
  15. Mile K. Stojcev
    Rohit Kapur, CTL for Test Information of Digital ICs Hardcover. Kluwer Academic Publisher, Boston, 2003. pp 173, plus XI, ISBN 1-4020-7293-7. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:7, pp:1171-1172 [Journal]
  16. Mile K. Stojcev
    Networks on Chip; Axel Jantsch, Hannu Tenhunen (Eds.). Kluwer Academic Publishers, Boston; 2003. Hardcover, pp 303, plus VIII, ISBN 1-4020-7392-5. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:7, pp:1203-1204 [Journal]
  17. Mile K. Stojcev
    Memory architecture exploration for programmable embedded systems; Peter Grun, Nikil Dutt, Alexandru Nicolau. Kluwer Academic Publishers, Boston. 2003. Hardcover, pp 128, plus XVII, ISBN 1-4020-7324-0. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:7, pp:1205-1206 [Journal]
  18. Mile K. Stojcev
    Power Distribution Networks in High Speed Integrated Circuits; Andrey Mezhiba, Eby Friedman. Kluwer Academic Publishers, Boston; 2004. Hardcover, 280pp, plus XXIII, ISBN 1-4020-7534-0. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:8, pp:1277-1278 [Journal]
  19. Mile K. Stojcev
    Oversampled delta-sigma modulators: analysis applications and novel topologies; Mücahit Kozak, Izzet Kale. Kluwer Academic Publishers, Boston. 2003. Hardcover, pp 226, plus XII, ISBN 1-4020-7420-4. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:6, pp:1029- [Journal]
  20. Mile K. Stojcev
    Interconnecting and Computing over Satellite Networks; Yongguang Zhang (Ed.). Kluwer Academic Publishers, Boston, 2003. Hardcover, pp 262, plus XXII, ISBN 1-4020-7424-7. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:2, pp:363-364 [Journal]
  21. Mile K. Stojcev
    Power estimation and optimization for VLIW-based embedded systems; Vittorio Zaccaria, Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano. Hardcover, pp 203, plus XXIV, Kluwer Academic Publishers, Boston, 2003. ISBN 1-4020-7377-1. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:4, pp:707-708 [Journal]
  22. Mile K. Stojcev
    System on chip design languages; Anne Mignotte, Eugenio Villar, Lynn Horobin, editors, Kluwer Academic Publishers, Boston, 2002. Hardcover, pp 283, plus IX, ISBN 1-4020-7046-2. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:1, pp:179- [Journal]
  23. Gang Qu, Miodrag Potkonjak, Mile K. Stojcev
    Book review: Intellectual property protection in VLSI designs: Theory and practice, Hardcover, pp 183, plus XIX, Kluwer Academic Publishers, Boston, 2003, ISBN 1-4020-7320-8. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:4, pp:705-706 [Journal]
  24. Mile K. Stojcev
    Reliability of Computer Systems and Networks: Fault Tolerance, Analysis and Design; Martin L. Shooman. John Wiley and Sons Inc., New York; 2002. Hardcover, pp 528, plus XXII. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:8, pp:1275-1276 [Journal]
  25. Mile K. Stojcev, Goran L. Djordjevic, Tatjana R. Stankovic
    Implementation of self-checking two-level combinational logic on FPGA and CPLD circuits. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:1, pp:173-178 [Journal]
  26. Mile K. Stojcev
    Design criteria for low distortion in feedback OPAMP circuits; Bjornar Hernes, Trond Saether, Kluwer Academic Publishers, Boston, 2003. Hardcover, pp 160, plus XXV, ISBN 1-4020-7356-9. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:1, pp:181-182 [Journal]
  27. Mile K. Stojcev
    Digital design and computer architecture; Hassan A. Farhat. CRC Press, Boca Raton: 2004. Hardcover, 487pp, plus XXII. ISBN 0-8493-1191-8. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:8, pp:1279-1280 [Journal]
  28. Mile K. Stojcev
    Power-Constrained Testing of VLSI Circuits. Nikola Nikolici, Bashir M. Al-Hashimi. Kluwer Academic Publishers, Boston, 2003. Hardcover, pp 178, plus XI, ISBN 1-4020-7235-X. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:3, pp:547-548 [Journal]
  29. Mile K. Stojcev
    N.G. Jacobson, The In-System Configuration Handbook: A Designer's Guide to ISC, Kluwer Academic Publishers, Boston, 2004, ISBN 1-4020-7655-X. Hardcover, pp 201, plus XVII. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:12, pp:1949-1950 [Journal]
  30. Mile K. Stojcev
    Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Computer Organization, Fifth edition, 2004, ISBN 0-07-112214-4. Hardcover, pp 805, plus XX. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:5-6, pp:1019-1020 [Journal]
  31. Mile K. Stojcev
    Behrouz A. Forouzan, Data Communications and Networking Third edition, McGraw-Hill Higher Education, Boston (2003) ISBN 0-07-251584-8 Softcover, pp 973, plus XXXIV. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:5-6, pp:1014-1016 [Journal]
  32. Mile K. Stojcev
    Layout-mixed-signal. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:1, pp:197-198 [Journal]
  33. Mile K. Stojcev
    Yale N. Patt and Sanjay J. Patel, Introduction to Computing Systems: From Bits and Gates to C and Beyond Second edition, McGraw-Hill Higher Education, Boston (2004) ISBN 0-07-121503-4 Softcover, pp 632, plus XXIV. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:2, pp:405-406 [Journal]
  34. Mile K. Stojcev
    Gregory A. Matson, Tony R. Taylor, Julie N. Villar, Elements of STIL: Principles and Applications of IEEE Std. 1450, Kluwer Academic Publishers, Boston, 2003, Hardcover, pp 291, plus XIX, ISBN 1-4020-7637-1 [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:12, pp:1951-1952 [Journal]
  35. Mile K. Stojcev
    Boris Murmann, Bernhard Boser, Digitally Assisted Pipeline ADCs: Theory and Implementation, Kluwer Academic Publishers, Boston, 2004, ISBN 1-4020-7839-0. Hardcover, pp 155, plus XX. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:5-6, pp:1017-1018 [Journal]
  36. Mile K. Stojcev
    Alberto Leon-Garcia, Indra Widjaja, Communication Networks: Fundamental Concepts and Key Architectures, Second edition, McGraw Hill Higher Education, Boston, 2004, ISBN 0-07-119848-2. Hardcover, pp 900, plus XXVII. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:7-8, pp:1273-1274 [Journal]
  37. Mile K. Stojcev
    Digital Computer Arithmetic Datapath Design Using Verilog HDL, James E. Stine, Kluwer Academic Publishers, Boston, 2004, ISBN 1-4020-7710-6. Hardcover, pp 180, plus XI. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:7-8, pp:1272- [Journal]
  38. Mile K. Stojcev
    Vadim Ivanov, Igor Filanovsky, Operational Amplifier Speed and Accuracy Improvement: Analog Circuit Design with Structural Methodology, Kluwer Academic Publishers, Boston, 2004, Hardcover, pp 194, plus XIV, ISBN 1-4020-7772-6. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:2, pp:407-408 [Journal]
  39. Mile K. Stojcev
    Design of Energy-Efficient Application-Specific Instruction Set Processors (ASIPs), Tilman Glokler, Heinrich Meyr, Kluwer Academic Publishers, Boston, 2004, ISBN 1-4020-7730-0, Hardcover, pp 234, plus XX. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:7-8, pp:1270-1271 [Journal]
  40. Mile K. Stojcev
    Data communication. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:2, pp:403-404 [Journal]
  41. Mile K. Stojcev
    Analog IP blocks. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:1, pp:195-196 [Journal]
  42. Mile K. Stojcev
    Testing Static Random Access Memories: Defects, Fault Models and Test Patterns, Said Hamdioui, Kluwer Academic Publishers, Boston, 2004, Hardcover, pp 221, plus XX, ISBN 1-4020-7752-1. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:5-6, pp:1012-1013 [Journal]
  43. Mile K. Stojcev
    S. Sutherland, S. Davidman and P. Flake, System Verilog for Design: A Guide to Using System Verilog for Hardware Design and Modeling Hardcover, Kluwer Academic Publishers, Norwell, MA (2004) ISBN 1-4020-7530-8 pp 374, plus XXVIII, euro 119. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:1, pp:198-199 [Journal]
  44. Mile K. Stojcev
    R. Jacob Baker, CMOS Circuit Design, Layout, and Simulation (second ed.), Wiley Interscience & IEEE Press (2005) ISBN 0-471-70055-X Hardcover, pp 1039, plus XXXIII. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:7, pp:1214-1215 [Journal]
  45. Mile K. Stojcev
    F. Mayer-Linderberg, Dedicated Digital Processors: Methods in Hardware/Software System Design, John Wiley & Sons, Ltd., Chichester (2004) ISBN 0-470-84444-2 Hardcover, pp 302, plus XI. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:5-6, pp:1025-1026 [Journal]
  46. Mile K. Stojcev
    Low Power Electronics Design, Christian Pignet, Editor, CRC Press, Boca Raton, 2005, Hardcover, pp 854, plus 18, ISBN 0-8493-1941-2. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:2-4, pp:653-654 [Journal]
  47. Mile K. Stojcev
    Sachin Sapatnekar, Timing, Kluwer Academic Publishers, Hardcover, ISBN 1-4020-7671-1, pp 294, plus IX. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:2-4, pp:651-652 [Journal]
  48. Mile K. Stojcev
    John P. Hayes, Computer Architecture and Organization, Third ed., McGraw-Hill Book Company, Inc., Boston, 1988, Softcover, pp 604, plus XIV, ISBN 0-07-115997-5. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:1, pp:196-197 [Journal]
  49. Mile K. Stojcev
    Stephen Brown Zvonko Vranesic, Fundamental of Digital Logic with Verilog Design, McGraw Hill, Boston, 2004, Hardcover, pp 844, plus XX, ISBN 0-07-121359-7. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:1, pp:194-195 [Journal]
  50. Mile K. Stojcev
    Sachin Sapatnekar, Timing, Kluwer Academic Publishers, Hardcover, pp 294, plus IX, ISBN 1-4020-7671-1. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:8, pp:1398-1399 [Journal]
  51. Mile K. Stojcev
    Alfredo Benso, Paolo Prinetto, editors, Fault injection techniques and tools for embedded systems reliability and evaluation, Kluwer Academic Publishers, Boston, 2003. Hardcover, pp 241, plus XIV, ISBN 1-4020-7589-8. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:8, pp:1396-1397 [Journal]
  52. Goran L. Djordjevic, Mile K. Stojcev, Tatjana R. Stankovic
    Approach to partially self-checking combinational circuits design. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2004, v:35, n:12, pp:945-952 [Journal]
  53. Mile K. Stojcev
    Data structures with C++ using STL, 2/e: William Ford, William Top (Eds.); Prentice Hall, Upper Saddle River, NJ, 2002, 1037 pages, hardcover, ISBN 0-13-085850-1, plus XXVI. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:1, pp:93-94 [Journal]
  54. Mile K. Stojcev
    System-on-a-Chip: Design and Test: Rochit Rajsuman (Ed.); Artech House, Boston, 2000, 277 pages, plus XIII, Hardcover, ISBN 1-58053-107-5, GBP61.00. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:4, pp:313-314 [Journal]
  55. Mile K. Stojcev
    Analog Design for CMOS VLSI Systems: Franco Maloberti (Ed.); Kluwer Academic Publishers, Dordrecht, 2001, 374 pages, plus XIII, hardcover, ISBN 0-7923-7550-5. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:2, pp:161- [Journal]

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