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Patrice Quinton:
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Publications of Author
- Philippe Besnard, Rene Quiniou, Patrice Quinton
A Theorem-Prover for a Decidable Subset of Default Logic. [Citation Graph (0, 0)][DBLP] AAAI, 1983, pp:27-30 [Conf]
- Patrice Quinton
An Introduction to Systolic Architectures. [Citation Graph (0, 0)][DBLP] Future Parallel Computers, 1986, pp:387-400 [Conf]
- François Charot, Madeleine Nyamsi, Patrice Quinton, Charles Wagner
Modeling and Scheduling Parallel Data Flow Systems using Structured Systems of Recurrence Equations. [Citation Graph (0, 0)][DBLP] ASAP, 2004, pp:6-16 [Conf]
- Anne-Claire Guillou, Patrice Quinton, Tanguy Risset
Hardware Synthesis for Multi-Dimensional Time. [Citation Graph (0, 0)][DBLP] ASAP, 2003, pp:40-50 [Conf]
- Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
Extension Of The Alpha Language To Recurrences On Sparse Periodic Domains. [Citation Graph (0, 0)][DBLP] ASAP, 1996, pp:391-401 [Conf]
- C. Dezan, Hervé Le Verge, Patrice Quinton, Yannick Saouter
The Alpha du Centaur environment. [Citation Graph (0, 0)][DBLP] Algorithms and Parallel VLSI Architectures, 1991, pp:325-334 [Conf]
- Patrice Quinton, Yves Robert
Algorithms and Parallel VLSI Architectures. [Citation Graph (0, 0)][DBLP] Algorithms and Parallel VLSI Architectures, 1991, pp:1-10 [Conf]
- Rumen Andonov, Patrice Quinton
Efficient Linear Systolic Array for the Knapsack Problem. [Citation Graph (0, 0)][DBLP] CONPAR, 1992, pp:247-258 [Conf]
- Pascale Guerdoux-Jamet, Dominique Lavenier, Charles Wagner, Patrice Quinton
Design and Implementation of a Parallel Architecture for Biological Sequence Comparison. [Citation Graph (0, 0)][DBLP] Euro-Par, Vol. I, 1996, pp:11-24 [Conf]
- Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
Deriving Imperative Code from Functional Programs. [Citation Graph (0, 0)][DBLP] FPCA, 1995, pp:36-44 [Conf]
- Hervé Le Verge, Patrice Quinton
The Palindrome Systolic Array Revisited. [Citation Graph (0, 0)][DBLP] Research Directions in High-Level Parallel Programming Languages, 1991, pp:298-308 [Conf]
- François Charot, Patrice Frison, Eric Gautrin, Dominique Lavenier, Patrice Quinton, Charles Wagner
From Equations to Hardware: Towards Systematic Mapping of Algorithms onto Parallel Architectures. [Citation Graph (0, 0)][DBLP] ICPIA, 1992, pp:1-15 [Conf]
- Pierrick Gachet, Christophe Mauras, Patrice Quinton, Yannick Saouter
Alpha du centaur: a prototype environment for the design of parallel regular alorithms. [Citation Graph (0, 0)][DBLP] ICS, 1989, pp:235-243 [Conf]
- David Cachera, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
Proving Properties of Multidimensional Recurrences with Application to Regular Parallel Algorithms. [Citation Graph (0, 0)][DBLP] IPDPS, 2001, pp:148- [Conf]
- Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
On deriving data parallel code from a functional program. [Citation Graph (0, 0)][DBLP] IPPS, 1995, pp:766-0 [Conf]
- Auguste Noumsi, Steven Derrien, Patrice Quinton
Acceleration of a content-based image-retrieval application on the RDISK cluster. [Citation Graph (0, 0)][DBLP] IPDPS, 2006, pp:- [Conf]
- Patrice Quinton
Automatic Synthesis of Systolic Arrays from Uniform Recurrent Equations. [Citation Graph (0, 0)][DBLP] ISCA, 1984, pp:208-214 [Conf]
- Anne-Claire Guillou, Patrice Quinton, Tanguy Risset, Daniel Massicotte
Automatic Design of VLSI Pipelined LMS Architectures. [Citation Graph (0, 0)][DBLP] PARELEC, 2000, pp:144-149 [Conf]
- François Charot, Madeleine Nyamsi, Patrice Quinton, Charles Wagner
Architecture Exploration for 3G Telephony Applications Using a Hardware-Software Prototyping Platform. [Citation Graph (0, 0)][DBLP] SAMOS, 2004, pp:244-253 [Conf]
- Patrice Quinton, Tanguy Risset
Structured Scheduling of Recurrence Equations: Theory and Practice. [Citation Graph (0, 0)][DBLP] Embedded Processor Design Challenges, 2002, pp:112-134 [Conf]
- Stephan Balev, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
Linear Programming Models for Scheduling Systems of Affine Recurrence Equations - A Comparative Study. [Citation Graph (0, 0)][DBLP] SPAA, 1998, pp:250-258 [Conf]
- Gautam Gupta, Sanjay V. Rajopadhye, Patrice Quinton
Scheduling reductions on realistic machines. [Citation Graph (0, 0)][DBLP] SPAA, 2002, pp:117-126 [Conf]
- Jean-Pierre Banâtre, Patrice Frison, Patrice Quinton
A Network for the Detection of Words in Continuous Speech. [Citation Graph (0, 0)][DBLP] Acta Inf., 1982, v:18, n:, pp:431-448 [Journal]
- Patrice Frison, François Charot, Eric Gautrin, Dominique Lavenier, Patrice Quinton, Frédéric Raimbault, Charles Wagner
From Equations to Hardware. Towards the Systematic Mapping of Algorithms onto Parallel Architectures. [Citation Graph (0, 0)][DBLP] IJPRAI, 1994, v:8, n:2, pp:417-438 [Journal]
- Clémentin Tayou Djamégni, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
Derivation of systolic algorithms for the algebraic path problem by recurrence transformations. [Citation Graph (0, 0)][DBLP] Parallel Computing, 2000, v:26, n:11, pp:1429-1445 [Journal]
- Rumen Andonov, Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
A Shift Registered-Based Systolic Array for the Unbounded Knapsack Problem. [Citation Graph (0, 0)][DBLP] Parallel Processing Letters, 1995, v:5, n:, pp:251-262 [Journal]
- Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
On Manipulating Z-Polyhedra Using a Canonical Representation. [Citation Graph (0, 0)][DBLP] Parallel Processing Letters, 1997, v:7, n:2, pp:181-194 [Journal]
- Abdelhamid Benaini, Patrice Quinton, Yves Robert, Yannick Saouter, Bernard Tourancheau
Synthesis of a New Systolic Architecture for the Algebraic Path Problem. [Citation Graph (0, 0)][DBLP] Sci. Comput. Program., 1990, v:15, n:2-3, pp:135-158 [Journal]
- Bertrand Hochet, Patrice Quinton, Yves Robert
Systolic Gaussian Elimination over GF(p) with Partial Pivoting. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1989, v:38, n:9, pp:1321-1324 [Journal]
- Patrice Quinton, Yves Robert
Systolic Convolution of Arithmetic Functions. [Citation Graph (0, 0)][DBLP] Theor. Comput. Sci., 1992, v:95, n:2, pp:207-229 [Journal]
- Rayan Chikhi, Steven Derrien, Auguste Noumsi, Patrice Quinton
Combining Flash Memory and FPGAs to Efficiently Implement a Massively Parallel Algorithm for Content-Based Image Retrieval. [Citation Graph (0, 0)][DBLP] ARC, 2007, pp:247-258 [Conf]
Parallelizing HMMER for Hardware Acceleration on FPGAs. [Citation Graph (, )][DBLP]
Constructing parallel programs and their termination proof. [Citation Graph (, )][DBLP]
Pure Systolic Array for a Class of Dynamic Dependency Recurrences. [Citation Graph (, )][DBLP]
Systolic Arrays: Why and How? [Citation Graph (, )][DBLP]
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