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Thomas Eisenbarth: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Thomas Eisenbarth, Rainer Koschke, Daniel Simon
    Derivation of Feature Component Maps by Means of Concept Analysis. [Citation Graph (0, 0)][DBLP]
    CSMR, 2001, pp:176-179 [Conf]
  2. Thomas Eisenbarth, Rainer Koschke, Daniel Simon
    Aiding Program Comprehension by Static and Dynamic Feature Analysis. [Citation Graph (0, 0)][DBLP]
    ICSM, 2001, pp:602-611 [Conf]
  3. Thomas Eisenbarth, Rainer Koschke, Daniel Simon
    Incremental Location of Combined Features for Large-Scale Programs. [Citation Graph (0, 0)][DBLP]
    ICSM, 2002, pp:273-0 [Conf]
  4. Thomas Eisenbarth, Rainer Koschke, Daniel Simon
    Feature-Driven Program Understanding Using Concept Analysis of Execution Traces. [Citation Graph (0, 0)][DBLP]
    IWPC, 2001, pp:300-309 [Conf]
  5. Rainer Koschke, Thomas Eisenbarth
    A Framework for Experimental Evaluation of Clustering Techniques. [Citation Graph (0, 0)][DBLP]
    IWPC, 2000, pp:201-210 [Conf]
  6. Daniel Simon, Thomas Eisenbarth
    Evolutionary Introduction of Software Product Lines. [Citation Graph (0, 0)][DBLP]
    SPLC, 2002, pp:272-282 [Conf]
  7. Jörg Czeranski, Thomas Eisenbarth, Holger M. Kienle, Rainer Koschke, Erhard Plödereder, Daniel Simon, Yan Zhang V, Jean-Francois Girard, Martin Würthner
    Data Exchange in Bauhaus. [Citation Graph (0, 0)][DBLP]
    WCRE, 2000, pp:293-295 [Conf]
  8. Jörg Czeranski, Thomas Eisenbarth, Holger M. Kienle, Rainer Koschke, Daniel Simon
    Analyzing xfig Using the Bauhaus Tools. [Citation Graph (0, 0)][DBLP]
    WCRE, 2000, pp:197-199 [Conf]
  9. Thomas Eisenbarth, Rainer Koschke, Gunther Vogel
    Static Trace Extraction. [Citation Graph (0, 0)][DBLP]
    WCRE, 2002, pp:128-0 [Conf]
  10. Thomas Eisenbarth, Rainer Koschke, Gunther Vogel
    Static object trace extraction for programs with pointers. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 2005, v:77, n:3, pp:263-284 [Journal]
  11. Dragan Bojic, Thomas Eisenbarth, Rainer Koschke, Daniel Simon, Dusan M. Velasevic
    Addendum to "Locating Features in Source Code'. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 2004, v:30, n:2, pp:140-0 [Journal]
  12. Thomas Eisenbarth, Rainer Koschke, Daniel Simon
    Locating Features in Source Code. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 2003, v:29, n:3, pp:210-224 [Journal]
  13. Andrey Bogdanov, Thomas Eisenbarth, Andy Rupp
    A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations. [Citation Graph (0, 0)][DBLP]
    CHES, 2007, pp:394-412 [Conf]
  14. Francesco Regazzoni, Stéphane Badel, Thomas Eisenbarth, Johann Großschädl, Axel Poschmann, Zeynep Toprak Deniz, Marco Macchetti, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne
    A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:209-214 [Conf]

  15. Fast Hash-Based Signatures on Constrained Devices. [Citation Graph (, )][DBLP]


  16. Reconfigurable trusted computing in hardware. [Citation Graph (, )][DBLP]


  17. Time-Area Optimized Public-Key Engines: -Cryptosystems as Replacement for Elliptic Curves?. [Citation Graph (, )][DBLP]


  18. MicroEliece: McEliece for Embedded Devices. [Citation Graph (, )][DBLP]


  19. Correlation-Enhanced Power Analysis Collision Attack. [Citation Graph (, )][DBLP]


  20. On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoqCode Hopping Scheme. [Citation Graph (, )][DBLP]


  21. Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs. [Citation Graph (, )][DBLP]


  22. Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits. [Citation Graph (, )][DBLP]


  23. Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?. [Citation Graph (, )][DBLP]


  24. Establishing Chain of Trust in Reconfigurable Hardware. [Citation Graph (, )][DBLP]


  25. KeeLoq and Side-Channel Analysis-Evolution of an Attack. [Citation Graph (, )][DBLP]


  26. Power Analysis of Single-Rail Storage Elements as Used in MDPL. [Citation Graph (, )][DBLP]


  27. Efficient implementation of eSTREAM ciphers on 8-bit AVR microcontrollers. [Citation Graph (, )][DBLP]


  28. A Survey of Lightweight-Cryptography Implementations. [Citation Graph (, )][DBLP]


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