The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

S. S. S. P. Rao: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Namit Chaturvedi, S. S. S. P. Rao, S. C. Patwardhan
    Programming Process Control in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    Embedded Systems and Applications, 2003, pp:87-94 [Conf]
  2. C. R. Venugopal, S. S. S. P. Rao
    Impact of Delays in Parallel I/O System: An Empirical Study. [Citation Graph (0, 0)][DBLP]
    HPDC, 1996, pp:490-499 [Conf]
  3. Meeta Srivastav, S. S. S. P. Rao, Himanshu Bhatnagar
    Power Reduction Technique Using Multi-vt Libraries. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2005, pp:363-367 [Conf]
  4. K. Baswaraj, S. Deepalakshmi, S. S. S. P. Rao, B. S. Jagdish, P. S. Dhekne, H. K. Kaura
    Parallel File System on Networked Intel Workstation. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2002, pp:1904-1911 [Conf]
  5. K. Baswaraj, S. S. S. P. Rao, B. S. Jagdish, P. S. Dhekne, H. K. Kaura
    Parallelization By Pattern Matching. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:1891-1895 [Conf]
  6. S. Deepalakshmi, K. Baswaraj, S. S. S. P. Rao, B. S. Jagdish, D. D. Sonavane, P. S. Dhekne, H. K. Kaura
    Performance Analysis of Parallel File System for I/O Load Balancing in Distributed Applications. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:713-720 [Conf]
  7. C. R. Venugopal, S. S. S. P. Rao, Sachin B. Patkar
    Priority Scheduling in Parallel I/O Systems. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1999, pp:2554-2560 [Conf]
  8. Ravi R. Pai, S. S. S. P. Rao
    An Over-the-Cell Channel Router. [Citation Graph (0, 0)][DBLP]
    VLSI, 1991, pp:327-336 [Conf]
  9. Saurabh Goyal, Mihir R. Choudhury, S. S. S. P. Rao, L. Kalyan Kumar
    Multiple Fault Testing of Logic Resources of SRAM-Based FPGAs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:742-747 [Conf]
  10. R. Maheshwari, S. S. S. P. Rao, E. G. Poonach
    FPGA Implementation of Median Filter. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:523-524 [Conf]
  11. Y. Z. Lashkari, S. S. S. P. Rao, V. Y. Mhaskar, A. C. Shelat
    PLX: A proposal to implement a general broadcasting facility in a distributed environment running X windows. [Citation Graph (0, 0)][DBLP]
    Computers & Graphics, 1992, v:16, n:2, pp:143-149 [Journal]
  12. Shishir Pardikar, Mahesh Vaidya, S. S. S. P. Rao
    GKS implementation: A case study. [Citation Graph (0, 0)][DBLP]
    Computers & Graphics, 1987, v:11, n:2, pp:75-78 [Journal]
  13. S. S. S. P. Rao, J. R. Isaac
    Interface Optimization: An Algorithm for the Detection of Data Path Redundancy and Reconfigurability Towards Obtaining Minimal Bus Interfaces. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:11, pp:1577-1580 [Journal]

Search in 0.003secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002