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Darrin M. Hanna: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Darrin M. Hanna, Richard E. Haskell
    Implementing Software Programs in FPGAs Using Flowpaths. [Citation Graph (0, 0)][DBLP]
    ESA/VLSI, 2004, pp:76-82 [Conf]
  2. Richard E. Haskell, Darrin M. Hanna
    Rapid Prototyping Using a Microprocessor Core on a Spartan II FPGA. [Citation Graph (0, 0)][DBLP]
    Embedded Systems and Applications, 2003, pp:49-55 [Conf]
  3. Darrin M. Hanna, Michael DuChene, Girma Tewolde, Jay Sattler
    Java Flowpaths: Efficiently Generating Circuits for Embedded Systems from Java. [Citation Graph (0, 0)][DBLP]
    ESA, 2006, pp:23-30 [Conf]
  4. Darrin M. Hanna, Richard E. Haskell
    Using Flowpaths for the High-Level Synthesis of Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:273-279 [Conf]
  5. Charles Lee, Darrin M. Hanna, Richard E. Haskell, Richard L. Alena
    Using Fuzzy Clustering for Real-time Space Flight Safety. [Citation Graph (0, 0)][DBLP]
    IC-AI, 2004, pp:619-626 [Conf]
  6. Ping Li, Richard E. Haskell, Darrin M. Hanna
    Optimizing Fuzzy Decision Trees Using Genetic Algorithms. [Citation Graph (0, 0)][DBLP]
    IC-AI, 2003, pp:469-474 [Conf]
  7. Richard E. Haskell, Darrin M. Hanna, Kevin Van Sickle
    3D Signature Biometrics Using Curvature Moments. [Citation Graph (0, 0)][DBLP]
    IC-AI, 2006, pp:718-721 [Conf]
  8. Richard E. Haskell, Darrin M. Hanna
    FPGA Integrated Co-Design. [Citation Graph (0, 0)][DBLP]
    MSE, 2001, pp:30-31 [Conf]
  9. Richard E. Haskell, Charles Lee, Darrin M. Hanna
    Geno-fuzzy classification trees. [Citation Graph (0, 0)][DBLP]
    Pattern Recognition, 2004, v:37, n:8, pp:1653-1659 [Journal]
  10. Darrin M. Hanna, Richard E. Haskell
    Flowpaths: Compiling stack-based IR to hardware. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:3, pp:125-136 [Journal]
  11. Richard E. Haskell, Darrin M. Hanna
    A VHDL--Forth Core for FPGAs. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2004, v:28, n:3, pp:115-125 [Journal]
  12. Darrin M. Hanna, Anna M. Spagnuolo, Michael DuChene
    Speedup using Flowpaths for a Finite Difference Solution of a 3D Parabolic PDE. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-6 [Conf]
  13. Darrin M. Hanna, Michael DuChene
    Executing large algorithms on low-capacity FPGAs using flowpath partitioning and runtime reconfiguration. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2007, v:31, n:5, pp:302-312 [Journal]

  14. A Compiler to Generate Hardware from Java Byte Codes for High Performance, Low Energy Embedded Systems. [Citation Graph (, )][DBLP]


  15. Maximizing area-constrained partial fault tolerance in reconfigurable logic. [Citation Graph (, )][DBLP]


  16. Accelerating the performance of particle swarm optimization for embedded applications. [Citation Graph (, )][DBLP]


  17. Particle Swarm Optimization for Cluster-Based Classification of Breast Cancer Data. [Citation Graph (, )][DBLP]


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