The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Mohsen Naderi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Amir Rezaeinia, Vali Fatemi, Hossein Pedram, Babak Sadeghian, Mohsen Naderi
    Asynchronous vs. Synchronous Design of RSA. [Citation Graph (0, 0)][DBLP]
    ESA, 2005, pp:100-105 [Conf]
  2. Mohammad K. Akbari, Ali Jahanian, Mohsen Naderi, Bahman Javadi
    Area Efficient, Low Power and Robust Design for Add-Compare-Select Units. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:611-614 [Conf]
  3. Mehrdad Najibi, Kamran Saleh, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi
    Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs (abstract only). [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:269- [Conf]
  4. Kamran Saleh, Mehrdad Najibi, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi
    A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:296-301 [Conf]
  5. Bahman Javadi, Mohsen Naderi, Hossein Pedram, Ali Afzali-Kusha, Mohammad K. Akbari
    An Asynchronous Viterbi Decoder for Low-Power Applications. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:471-480 [Conf]
  6. Mehrdad Najibi, Kamran Saleh, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi
    Prototyping Globally Asynchronous Locally Synchronous Circuits on Commercial Synchronous FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2005, pp:63-69 [Conf]

Search in 0.001secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002