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Publications of Author

1. Richard Scottow, Klaus D. McDonald-Maier
   Measuring Determinism in Real-Time Embedded Systems using Cached Processors. [Citation Graph (0, 0)][DBLP]
   ESA, 2005, pp:38-44 [Conf]
   
2. A. Mayer, H. Siebert, Klaus D. McDonald-Maier
   Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs. [Citation Graph (0, 0)][DBLP]
   DATE, 2005, pp:148-152 [Conf]
   
3. David H. Akehurst, Behzad Bordbar, M. J. Evans, W. G. J. Howells, Klaus D. McDonald-Maier
   SiTra: Simple Transformations in Java. [Citation Graph (0, 0)][DBLP]
   MoDELS, 2006, pp:351-364 [Conf]
   
4. Andrew B. T. Hopkins, Klaus D. McDonald-Maier
   Transform Digital Signal Processor Architecture using Optical Interconnections. [Citation Graph (0, 0)][DBLP]
   Parallel and Distributed Computing and Networks, 2005, pp:7-12 [Conf]
   
5. Tughrul Arslan, Nakul Haridas, Erfu Yang, Ahmet T. Erdogan, Nick Barton, A. J. Walton, John S. Thompson, Adrian Stoica, T. Vladimirova, Klaus D. McDonald-Maier, W. G. J. Howells
   ESPACENET: A Framework of Evolvable and Reconfigurable Sensor Networks for Aerospace-Based Monitoring and Diagnostics. [Citation Graph (0, 0)][DBLP]
   AHS, 2006, pp:323-329 [Conf]
   
6. Andrew B. T. Hopkins, Klaus D. McDonald-Maier
   A Generic On-Chip Debugger for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
   AHS, 2006, pp:338-342 [Conf]
   
7. Gareth Howells, Evangelos Papoutsis, Klaus D. McDonald-Maier
   Novel Techniques for Ensuring Secure Communications for Distributed Low Power Devices. [Citation Graph (0, 0)][DBLP]
   AHS, 2006, pp:343-350 [Conf]
   
8. Andrew B. T. Hopkins, Klaus D. McDonald-Maier
   Debug Support Strategy for Systems-on-Chips with Multiple Processor Cores. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:2, pp:174-184 [Journal]
   
9. Nikolaos G. Bartzoudis, Klaus D. McDonald-Maier
   Online monitoring of FPGA-based co-processing engines embedded in dependable workstations. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2007, pp:79-84 [Conf]
   
10. Andrew B. T. Hopkins, Klaus D. McDonald-Maier
    Debug support for embedded processor reuse. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
11. A. Mayer, H. Siebert, Klaus D. McDonald-Maier
    Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
    
12. 
    JetBench: An Open Source Real-time Multiprocessor Benchmark. [Citation Graph (, )][DBLP]
    
    
13. 
    Novel Hardware Algorithms for Row-Parallel Integral Image Calculation. [Citation Graph (, )][DBLP]
    
    
14. 
    Array OL Descriptions of Repetitive Structures in VHDL. [Citation Graph (, )][DBLP]
    
    
15. 
    A Novel Potential Field Algorithm and an Intelligent Multi-classifier for the Automated Control and Guidance System (ACOS). [Citation Graph (, )][DBLP]
    
    
16. 
    Maths Vs (Meta)Modelling - Are We Reinventing the Wheel? [Citation Graph (, )][DBLP]
    
    
17. 
    Dynamic Scheduling of Test Routines for Efficient Online Self-Testing of Embedded Microprocessors. [Citation Graph (, )][DBLP]
    
    
18. 
    Key Generation for Secure Inter-satellite Communication. [Citation Graph (, )][DBLP]
    
    
19. 
    Renewal theory sleep time optimisation for scheduling events in Wireless Sensor Networks. [Citation Graph (, )][DBLP]
    
    
20. 
    Normalizing Discrete Circuit Features with Statistically Independent values for incorporation within a highly Secure Encryption System. [Citation Graph (, )][DBLP]
    
    
21. 
    Debug Support for Hybrid SoCs. [Citation Graph (, )][DBLP]
    
    
22. 
    An embedded sensor validation system for adaptive condition monitoring of a wind farms. [Citation Graph (, )][DBLP]
    
    
23. 
    A System Level Framework for Monitoring and Self Diagnosis in ESPACENET. [Citation Graph (, )][DBLP]
    
    
24. 
    Trace algorithms for deeply integrated complex and hybrid SoCs. [Citation Graph (, )][DBLP]
    
    
25. 
    TRICODA - Complex Data Analysis and Condition Monitoring based onv Neural Network Model. [Citation Graph (, )][DBLP]
    
    
26. 
    Ensuring data integrity via ICmetrics based security infrastructure. [Citation Graph (, )][DBLP]
    
    
27. 
    Design and Analysis of a novel weightless artificial neural based Multi-Classifier. [Citation Graph (, )][DBLP]
    
    
28. 
    Integrating Multi-Modal Circuit Features within an Efficient Encryption System. [Citation Graph (, )][DBLP]
    
    
29. 
    A Fuzzy Logic Reconfiguration Engine for Symmetric Chip Multiprocessors. [Citation Graph (, )][DBLP]
    
    
30. 
    Compiling UML State Diagrams into VHDL: An Experiment in Using Model Driven Development. [Citation Graph (, )][DBLP]
    
    
31. 
    I²S³ the Integrated Intelligent Secure Sensor Systems Project. [Citation Graph (, )][DBLP]
    
    
32. 
    An adaptive processing node architecture for validating sensors reliability in a wind farm. [Citation Graph (, )][DBLP]
    
    
33. 
    MAVIS: A Secure Formal Computational Paradigm based on the Mammalian Visual System. [Citation Graph (, )][DBLP]
    
    
34. 
    Effects of Feature Trimming on Encryption Key Stability for an ICmetric System. [Citation Graph (, )][DBLP]
    
    
35. 
    Partially Observable Markov Decision Process for Transmitter Power Control in Wireless Sensor Networks. [Citation Graph (, )][DBLP]
    
    
36. 
    Towards Embedded Artificial Intelligence Based Security for Computer Systems. [Citation Graph (, )][DBLP]
    
    
37. 
    Ensuring Secure Healthcare Communications via ICmetric Based Encryption on Unseen Devices. [Citation Graph (, )][DBLP]
    
    
38. 
    Boosting Debugging Support for Complex Systems on Chip. [Citation Graph (, )][DBLP]