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Publications of Author

1. Li-Chuan Weng, Xiaojun Wang, Alan P. Su, Bin Liu
   Low Power Heuristic Block-level Voltage/Frequency Scheduling. [Citation Graph (0, 0)][DBLP]
   ESA/VLSI, 2004, pp:577-581 [Conf]
   
2. Wei-Hsuan Hung, Yi-Jung Chen, Chia-Lin Yang, Yen-Sheng Chang, Alan P. Su
   An architectural co-synthesis algorithm for energy-aware network-on-chip design. [Citation Graph (0, 0)][DBLP]
   SAC, 2007, pp:680-684 [Conf]
   
3. 
   Transaction Level Modeling and Design Space Exploration for SOC Test Architectures. [Citation Graph (, )][DBLP]
   
   
4. 
   Flow Maximization for NoC Routing Algorithms. [Citation Graph (, )][DBLP]
   
   
5. 
   Fluidity concept for NoC: A congestion avoidance and relief routing scheme. [Citation Graph (, )][DBLP]