|
Search the dblp DataBase
Peiyi Zhao:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Peiyi Zhao, Tarek Darwish, Magdy A. Bayoumi
Low Power Conditional-Discharge Pulsed Flip-Flops. [Citation Graph (0, 0)][DBLP] Embedded Systems and Applications, 2003, pp:204-209 [Conf]
- Peiyi Zhao, Golconda Pradeep Kumar, Magdy Bayoumi
Contention reduced/conditional discharge flip-flops for level conversion in CVS systems. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2004, pp:669-672 [Conf]
- Peiyi Zhao, Golconda Pradeep Kumar, C. Archana, Magdy A. Bayoumi
A Double-Edge Implicit-Pulsed Level Convert Flip-Flop. [Citation Graph (0, 0)][DBLP] ISVLSI, 2004, pp:141-144 [Conf]
- Sarnath Ramnath, Peiyi Zhao
On the isomorphism of expressions. [Citation Graph (0, 0)][DBLP] Inf. Process. Lett., 2000, v:74, n:3-4, pp:97-102 [Journal]
- Peiyi Zhao, Tarek Darwish, Magdy A. Bayoumi
High-performance and low-power conditional discharge flip-flop. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:5, pp:477-484 [Journal]
- Peiyi Zhao, Jason McNeely, Magdy A. Bayoumi, Golconda Pradeep Kumar, Weidong Kuang
A Low Power Domino with Differential-Controlled-Keeper. [Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:1625-1628 [Conf]
- M. I. Faisal, Magdy A. Bayoumi, Peiyi Zhao
A low-power clock frequency multiplier. [Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf]
- Peiyi Zhao, Jason McNeely, Pradeep Golconda, Magdy A. Bayoumi, Robert A. Barcenas, Weidong Kuang
Low-Power Clock Branch Sharing Double-Edge Triggered Flip-Flop. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2007, v:15, n:3, pp:338-345 [Journal]
Soft Error Hardening for Asynchronous Circuits. [Citation Graph (, )][DBLP]
Power analysis of the Huffman decoding tree. [Citation Graph (, )][DBLP]
PMCNOC: A Pipelining Multi-Channel Central Caching Network-on-Chip Communication Architecture Design. [Citation Graph (, )][DBLP]
Search in 0.001secs, Finished in 0.002secs
|