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Kip Killpack:
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Publications of Author
- Chirayu S. Amin, Chandramouli V. Kashyap, Noel Menezes, Kip Killpack, Eli Chiprout
A multi-port current source model for multiple-input switching effects in CMOS library cells. [Citation Graph (0, 0)][DBLP] DAC, 2006, pp:247-252 [Conf]
- Chirayu S. Amin, Noel Menezes, Kip Killpack, Florentin Dartu, Umakanta Choudhury, Nagib Hakim, Yehea I. Ismail
Statistical static timing analysis: how simple can we get? [Citation Graph (0, 0)][DBLP] DAC, 2005, pp:652-657 [Conf]
- Debasish Das, Ahmed Shebaita, Yehea I. Ismail, Hai Zhou, Kip Killpack
NostraXtalk: a predictive framework for accurate static timing analysis in udsm vlsi circuits. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2007, pp:25-30 [Conf]
- Kip Killpack, Chandramouli V. Kashyap, Eli Chiprout
Silicon Speedpath Measurement and Feedback into EDA flows. [Citation Graph (0, 0)][DBLP] DAC, 2007, pp:390-395 [Conf]
Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering. [Citation Graph (, )][DBLP]
Speedpath prediction based on learning from a small set of examples. [Citation Graph (, )][DBLP]
Silicon feedback to improve frequency of high-performance microprocessors: an overview. [Citation Graph (, )][DBLP]
FA-STAC: A Framework for Fast and Accurate Static Timing Analysis with Coupling. [Citation Graph (, )][DBLP]
Case Study on Speed Failure Causes in a Microprocessor. [Citation Graph (, )][DBLP]
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