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Bulent I. Dervisoglu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jacob A. Abraham, Sandip Kundu, Janak H. Patel, Manuel A. d'Abreu, Bulent I. Dervisoglu, Marc E. Levitt, Hector R. Sucar, Ron G. Walther
    Microprocessor Testing: Which Technique is Best? (Panel). [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:294- [Conf]
  2. Bulent I. Dervisoglu
    A Unified DFT Architecture for Use with IEEE 1149.1 and VSIA/IEEE P1500 Compliant Test Access Controllers. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:53-58 [Conf]
  3. Bulent I. Dervisoglu, M. A. Keil
    ATLAS/ELA: Scan-based Software Tools for Reducing System Debug Time in a State-of-the-art Workstation. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:718-721 [Conf]
  4. Bulent I. Dervisoglu
    On Coosing a Hardware Descriptive Language for Digital Systems Testing/Verification. [Citation Graph (0, 0)][DBLP]
    ITC, 1984, pp:184-187 [Conf]
  5. Bulent I. Dervisoglu
    Using Scan Technology for Debug and Diagnostics in a Workstation Environment. [Citation Graph (0, 0)][DBLP]
    ITC, 1988, pp:976-986 [Conf]
  6. Bulent I. Dervisoglu, Mike Ricchetti, William Eklow
    Shared I/O-cell structures: a framework for extending the IEEE 1149.1 boundary-scan standard. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:980-0 [Conf]
  7. Bulent I. Dervisoglu, Gayvin E. Stong
    Design for Testability: Using Scanpath Techniques for Path-Delay Test and Measurement. [Citation Graph (0, 0)][DBLP]
    ITC, 1991, pp:365-374 [Conf]
  8. Bulent I. Dervisoglu, Gayvin E. Stong
    Application of Scan-Based DFT Methodology for Detecting Static and Timing Failures in VLSI Components. [Citation Graph (0, 0)][DBLP]
    VLSI, 1991, pp:429-438 [Conf]
  9. Fidel Muradali, Mike Ricchetti, Bart Vermeulen, Bulent I. Dervisoglu, Bob Gottlieb, Bernd Koenemann, C. J. Clark
    Reducing Time to Volume and Time to Market: Is Silicon Debug and Diagnosis the Answer? [Citation Graph (0, 0)][DBLP]
    VTS, 2002, pp:445-446 [Conf]
  10. Bulent I. Dervisoglu
    Boundary-Scan Update: IEEE P1149.2 Description and Status Report. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1992, v:9, n:3, pp:79-81 [Journal]
  11. Bulent I. Dervisoglu
    Special Report: Shared-I/O Scan Test. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:4, pp:81-83 [Journal]
  12. Bulent I. Dervisoglu, Donald J. Criscione
    A Hard Progammable Control Unit Design Using VLSI Technology. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:10, pp:800-810 [Journal]
  13. Bulent I. Dervisoglu, Howard A. Sholl
    Theory and Design of Mixed-Mode Sequential Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:639-648 [Journal]
  14. Bulent I. Dervisoglu
    Application of scan hardware and software for debug and diagnostics in a workstation environment. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:6, pp:612-620 [Journal]

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