Exploration of Low Power Adders for a SIMD Data Path. [Citation Graph (, )][DBLP]
Effectiveness of adaptive supply voltage and body bias as post-silicon variability compensation techniques for full-swing and low-swing on-chip communication channels. [Citation Graph (, )][DBLP]
How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design. [Citation Graph (, )][DBLP]
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