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Philip N. Strenski: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Xiaoliang Bai, Chandramouli Visweswariah, Philip N. Strenski
    Uncertainty-aware circuit optimization. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:58-63 [Conf]
  2. Andrew R. Conn, Ibrahim M. Elfadel, W. W. Molzen, P. R. O'Brien, Philip N. Strenski, Chandramouli Visweswariah, C. B. Whan
    Gradient-Based Optimization of Custom Circuits Using a Static-Timing Formulation. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:452-459 [Conf]
  3. Victor V. Zyuban, Philip N. Strenski
    Unified methodology for resolving power-performance tradeoffs at the microarchitectural and circuit levels. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:166-171 [Conf]
  4. Viji Srinivasan, David Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma
    Optimizing pipelines for power and performance. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:333-344 [Conf]
  5. Philip N. Strenski, Scott Kirkpatrick
    Analysis of Finite Length Annealing Schedules. [Citation Graph (0, 0)][DBLP]
    Algorithmica, 1991, v:6, n:3, pp:346-366 [Journal]
  6. Victor V. Zyuban, Philip N. Strenski
    Balancing hardware intensity in microprocessor pipelines. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2003, v:47, n:5-6, pp:585-598 [Journal]
  7. Victor V. Zyuban, David Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma
    Integrated Analysis of Power and Performance for Pipelined Microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2004, v:53, n:8, pp:1004-1016 [Journal]

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