The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Smita Bakshi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Smita Bakshi, Daniel Gajski
    Hardware/Software Partitioning and Pipelining. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:713-716 [Conf]
  2. Smita Bakshi, Daniel D. Gajski
    Design exploration for high-performance pipelines. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:312-316 [Conf]
  3. Smita Bakshi, Daniel Gajski
    A Scheduling and Pipelining Algorithm for Hardware/Software Systems. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:113-0 [Conf]
  4. Nithya Raghavan, Venkatesh Akella, Smita Bakshi
    Automatic Insertion of Gated Clocks at Register Transfer Level. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:48-54 [Conf]
  5. Smita Bakshi, Daniel Gajski
    Performance-constrained hierarchical pipelining for behaviors, loops, and operations. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:1-25 [Journal]
  6. Jie Gong, Daniel Gajski, Smita Bakshi
    Model refinement for hardware-software codesign. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1997, v:2, n:1, pp:22-41 [Journal]
  7. Smita Bakshi, Daniel D. Gajski
    Component selection for high-performance pipelines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:2, pp:181-194 [Journal]
  8. Smita Bakshi, Daniel D. Gajski
    Partitioning and pipelining for performance-constrained hardware/software systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:419-432 [Journal]

  9. A memory selection algorithm for high-performance pipelines. [Citation Graph (, )][DBLP]


  10. A component selection algorithm for high-performance pipelines. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002