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Vineet Wason :
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Anirban Basu , Sheng-Chih Lin , Vineet Wason , Amit Mehrotra , Kaustav Banerjee Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era. [Citation Graph (0, 0)][DBLP ] DAC, 2004, pp:884-887 [Conf ] Vineet Wason , Kaustav Banerjee A probabilistic framework for power-optimal repeater insertion in global interconnects under parameter variations. [Citation Graph (0, 0)][DBLP ] ISLPED, 2005, pp:131-136 [Conf ] Songqing Zhang , Vineet Wason , Kaustav Banerjee A probabilistic framework to estimate full-chips subthreshold leakage power distribution considering within-die and die-to-die P-T-V variations. [Citation Graph (0, 0)][DBLP ] ISLPED, 2004, pp:156-161 [Conf ] Vineet Wason , Rajeev Murgai , William W. Walker An Efficient Uncertainty- and Skew-aware Methodology for Clock Tree Synthesis and Analysis. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2007, pp:271-277 [Conf ] Search in 0.002secs, Finished in 0.002secs