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Byron Krauter :
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Michael W. Beattie , Hui Zheng , Anirudh Devgan , Byron Krauter Spatially distributed 3D circuit models. [Citation Graph (0, 0)][DBLP ] DAC, 2005, pp:153-158 [Conf ] Rohini Gupta , Byron Krauter , Bogdan Tutuianu , John Willis , Lawrence T. Pileggi The Elmore Delay as a Bound for RC Trees with Generalized Input Signals. [Citation Graph (0, 0)][DBLP ] DAC, 1995, pp:364-369 [Conf ] Chandramouli V. Kashyap , Byron Krauter A realizable driving point model for on-chip interconnect with inductance. [Citation Graph (0, 0)][DBLP ] DAC, 2000, pp:190-195 [Conf ] Byron Krauter , Rohini Gupta , John Willis , Lawrence T. Pileggi Transmission Line Synthesis. [Citation Graph (0, 0)][DBLP ] DAC, 1995, pp:358-363 [Conf ] Byron Krauter , Sharad Mehrotra Layout Based Frequency Dependent Inductance and Resistance Extraction for On-Chip Interconnect Timing Analysis. [Citation Graph (0, 0)][DBLP ] DAC, 1998, pp:303-308 [Conf ] Byron Krauter , David Widiger Variable frequency crosstalk noise analysis: : a methodology to guarantee functionality from dc to fmax. [Citation Graph (0, 0)][DBLP ] DAC, 2002, pp:665-668 [Conf ] Byron Krauter , Yu Xia , E. Aykut Dengi , Lawrence T. Pileggi A Sparse Image Method for BEM Capacitance Extraction. [Citation Graph (0, 0)][DBLP ] DAC, 1996, pp:357-362 [Conf ] Haihua Su , David Widiger , Chandramouli V. Kashyap , Frank Liu , Byron Krauter A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis. [Citation Graph (0, 0)][DBLP ] DAC, 2005, pp:186-189 [Conf ] Hui Zheng , Lawrence T. Pileggi , Michael W. Beattie , Byron Krauter Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses. [Citation Graph (0, 0)][DBLP ] DATE, 2002, pp:628-633 [Conf ] Byron Krauter , Lawrence T. Pileggi Generating sparse partial inductance matrices with guaranteed stability. [Citation Graph (0, 0)][DBLP ] ICCAD, 1995, pp:45-52 [Conf ] S. Y. Kim , Emre Tuncer , Rohini Gupta , Byron Krauter , T. Savarino , Dean P. Neikirk , Lawrence T. Pillage An efficient methodology for extraction and simulation of transmission lines for application specific electronic modules. [Citation Graph (0, 0)][DBLP ] ICCAD, 1993, pp:58-65 [Conf ] Masud H. Chowdhury , Chirayu S. Amin , Yehea I. Ismail , Chandramouli V. Kashyap , Byron Krauter Realizable reduction of RLC circuits using node elimination. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2003, pp:494-497 [Conf ] Masud H. Chowdhury , Yehea I. Ismail , Chandramouli V. Kashyap , Byron Krauter Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance. [Citation Graph (0, 0)][DBLP ] ISCAS (4), 2002, pp:197-200 [Conf ] Anirudh Devgan , Luca Daniel , Byron Krauter , Lei He Modeling and Design of Chip-Package Interface. [Citation Graph (0, 0)][DBLP ] ISQED, 2005, pp:6- [Conf ] Rohini Gupta , Byron Krauter , Lawrence T. Pileggi On Moment-Based Metric for Optimal Termination of Transmission Line Interconnects. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1996, pp:150-155 [Conf ] Hui Zheng , Byron Krauter , Lawrence T. Pileggi Electrical Modeling of Integrated-Package Power and Ground Distributions. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2003, v:20, n:3, pp:24-31 [Journal ] James D. Warnock , John M. Keaty , John G. Petrovick , Joachim G. Clabes , Charles J. Kircher , Byron Krauter , Phillip Restle , Brian A. Zoric , Carl J. Anderson The circuit and physical design of the POWER4 microprocessor. [Citation Graph (0, 0)][DBLP ] IBM Journal of Research and Development, 2002, v:46, n:1, pp:27-52 [Journal ] Michael W. Beattie , Byron Krauter , Lale Alatan , Lawrence T. Pileggi Equipotential shells for efficient inductance extraction. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:1, pp:70-79 [Journal ] Rohini Gupta , Byron Krauter , Lawrence T. Pileggi Transmission line synthesis via constrained multivariable optimization. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:1, pp:6-19 [Journal ] Gerard V. Kopcsay , Byron Krauter , David Widiger , Alina Deutsch , B. J. Rubin , H. H. Smith A comprehensive 2-D inductance modeling approach for VLSI interconnects: frequency-dependent extraction and compact circuit model synthesis. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2002, v:10, n:6, pp:695-711 [Journal ] Yehea I. Ismail , Byron Krauter Guest editorial: special issue on on-chip inductance in high-speed integrated circuits. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2002, v:10, n:6, pp:683-684 [Journal ] Search in 0.002secs, Finished in 0.303secs