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Derek L. Beatty: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Derek L. Beatty, Randal E. Bryant
    Fast Incremental Circuit Analysis Using Extracted Hierarchy. [Citation Graph (0, 0)][DBLP]
    DAC, 1988, pp:495-500 [Conf]
  2. Derek L. Beatty, Randal E. Bryant
    Formally Verifying a Microprocessor Using a Simulation Methodology. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:596-602 [Conf]
  3. Randal E. Bryant, Derek L. Beatty, Karl S. Brace, K. Cho, Thomas J. Sheffler
    COSMOS: A Compiled Simulator for MOS Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1987, pp:9-16 [Conf]
  4. Randal E. Bryant, Derek L. Beatty, Carl-Johan H. Seger
    Formal Hardware Verification by Symbolic Ternary Trajectory Evaluation. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:397-402 [Conf]
  5. Manish Pandey, Richard Raimi, Derek L. Beatty, Randal E. Bryant
    Formal Verification of PowerPC Arrays Using Symbolic Trajectory Evaluation. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:649-654 [Conf]
  6. Manish Pandey, Alok Jain, Randal E. Bryant, Derek L. Beatty, Gary York, Samir Jain
    Extraction of finite state machines from transistor netlists by symbolic simulation. [Citation Graph (0, 0)][DBLP]
    ICCD, 1995, pp:596-601 [Conf]

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