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Riccardo Scarsi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:128-133 [Conf]
  2. Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    A Discrete-Time Battery Model for High-Level Power Estimation. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:35-0 [Conf]
  3. Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Extending lifetime of portable systems by battery scheduling. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:197-203 [Conf]
  4. Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Glitch Power Minimization by Gate Freezing. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:163-167 [Conf]
  5. Alberto Macii, Enrico Macii, Giuseppe Odasso, Massimo Poncino, Riccardo Scarsi
    Regression-Based Macromodeling for Delay Estimation of Behavioral Components. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1999, pp:188-191 [Conf]
  6. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Fast power estimation for deterministic input streams. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:494-501 [Conf]
  7. Fabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi
    Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:235-241 [Conf]
  8. Andrea Acquaviva, Riccardo Scarsi
    A spatially-adaptive bus interface for low-switching communication (poster session). [Citation Graph (0, 0)][DBLP]
    ISLPED, 2000, pp:238-240 [Conf]
  9. Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Stream synthesis for efficient power simulation based on spectral transforms. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1998, pp:30-35 [Conf]
  10. Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Riccardo Scarsi
    Battery-Driven Dynamic Power Management of Portable Systems. [Citation Graph (0, 0)][DBLP]
    ISSS, 2000, pp:25-33 [Conf]
  11. Luca Benini, Giuliano Castelli, Alberto Macii, Riccardo Scarsi
    Battery-Driven Dynamic Power Management. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:2, pp:53-60 [Journal]
  12. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    A multilevel engine for fast power simulation of realistic inputstreams. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:4, pp:459-472 [Journal]
  13. Luca Benini, Alberto Macii, Massimo Poncino, Riccardo Scarsi
    Architectures and synthesis algorithms for power-efficient businterfaces. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:9, pp:969-980 [Journal]
  14. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1999, v:4, n:4, pp:351-375 [Journal]
  15. Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Glitch power minimization by selective gate freezing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:3, pp:287-298 [Journal]
  16. Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Discrete-time battery models for system-level low-power design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2001, v:9, n:5, pp:630-640 [Journal]
  17. Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Stream synthesis for efficient power simulation based on spectral transforms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2001, v:9, n:3, pp:417-426 [Journal]
  18. Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
    Scheduling battery usage in mobile systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:6, pp:1136-1143 [Journal]

  19. Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks. [Citation Graph (, )][DBLP]


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