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Giancarlo Beraudo: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Giancarlo Beraudo, John Lillis
    Timing optimization of FPGA placements by logic replication. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:196-201 [Conf]
  2. Milos Hrkic, John Lillis, Giancarlo Beraudo
    An approach to placement-coupled logic replication. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:711-716 [Conf]
  3. Milos Hrkic, John Lillis, Giancarlo Beraudo
    An Approach to Placement-Coupled Logic Replication. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:11, pp:2539-2551 [Journal]

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