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Michael Payer: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Reinaldo A. Bergamaschi, Raul Camposano, Michael Payer
    Data-Path Synthesis Using Path Analysis. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:591-596 [Conf]
  2. Jörg Bormann, Jörg Lohse, Michael Payer, Gerd Venzl
    Model Checking in Industrial Hardware Design. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:298-303 [Conf]
  3. Michael Payer
    Finite State Machine Theory as a Tool for Construction of Systolic Arrays. [Citation Graph (0, 0)][DBLP]
    EUROCAST, 1989, pp:212-224 [Conf]
  4. Michael Payer
    Systematischer Entwurf von Makroprozessoren. [Citation Graph (0, 0)][DBLP]
    GI Jahrestagung, 1980, pp:541- [Conf]
  5. Michael Payer
    Hierarchische Zerlegung von Graphen mit zwei ausgezeichneten Knoten mit Anwendugen bei der Synthese und Analyse von MOS-Schaltungen. [Citation Graph (0, 0)][DBLP]
    GI Jahrestagung (2), 1988, pp:174-190 [Conf]
  6. J. Biesenack, Norbert Wehn, A. Stoll, Michael Payer
    Data Part Optimizations in the CALLAS Synthesis Environment. [Citation Graph (0, 0)][DBLP]
    Synthesis for Control Dominated Circuits, 1992, pp:263-274 [Conf]
  7. J. Biesenack, M. Koster, A. Langmaier, S. Ledeux, S. Marz, Michael Payer, Michael Pilsl, S. Rumler, H. Soukup, Norbert Wehn, P. Duzy
    The Siemens high-level synthesis system CALLAS. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:3, pp:244-253 [Journal]

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