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Anthony M. Hill: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Clive Bittlestone, Anthony M. Hill, Vipul Singhal, N. V. Arvind
    Architecting ASIC libraries and flows in nanometer era. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:776-781 [Conf]
  2. Robert W. Brodersen, Anthony M. Hill, John Kibarian, Desmond Kirkpatrick, Mark A. Lavin, Mitsumasa Koyanagi
    Nanometer design: what hurts next...? [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:242- [Conf]
  3. N. S. Nagaraj, Tom Bonifield, Abha Singh, Clive Bittlestone, Usha Narasimha, Viet Le, Anthony M. Hill
    BEOL variability and impact on RC extraction. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:758-759 [Conf]
  4. Chin-Chi Teng, Anthony M. Hill, Sung-Mo Kang
    Estimation of maximum transition counts at internal nodes in CMOS VLSI circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:366-370 [Conf]
  5. Anthony M. Hill, Sung-Mo Kang
    Determining accuracy bounds for simulation-based switching activity estimation. [Citation Graph (0, 0)][DBLP]
    ISLPD, 1995, pp:215-220 [Conf]
  6. Uming Ko, Anthony M. Hill, Poras T. Balsara
    Design techniques for high performance, energy efficient control logic. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:97-100 [Conf]
  7. Uming Ko, Andrew Pua, Anthony M. Hill, Pranjal Srivastava
    Hybrid dual-threshold design techniques for high-performance processors with low-power features. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1997, pp:307-311 [Conf]
  8. Anthony M. Hill, Sung-Mo Kang
    Genetic Algorithm Based Design Optimization Of CMOS VLSI Circuits. [Citation Graph (0, 0)][DBLP]
    PPSN, 1994, pp:546-555 [Conf]
  9. Sanjive Agarwala, Paul Wiley, Arjun Rajagopal, Anthony M. Hill, Raguram Damodaran, Lewis Nardini, Tim Anderson, Steven Mullinnix, Jose Flores, Heping Yue, Abhijeet Chachad, John Apostol, Kyle Castille, Usha Narasimha, Tod Wolf, N. S. Nagaraj, Manjeri Krishnan, Luong Nguyen, Todd Kroeger, Mike Gill, Peter Groves, Bill Webster, Joel Graber, Christine Karlovich
    A 800 MHz System-on-Chip for Wireless Infrastructure Applications. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:381-0 [Conf]
  10. Usha Narasimha, Anthony M. Hill, N. S. Nagaraj
    SmartExtract: Accurate Capacitance Extraction for SOC Designs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:786-789 [Conf]
  11. Anthony M. Hill, Sung-Mo Kang
    Determining accuracy bounds for simulation-based switching activity estimation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:6, pp:611-618 [Journal]

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