The SCEAS System
Navigation Menu
Introduction
Collection Based
Clustering
Ranking
Paper Based
Journals
Conferences
DB Status
Statistics
Search

Search the dblp DataBase

Title:
Author:
Soheil Ghiasi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi, Majid Sarrafzadeh
    Optimal integer delay budgeting on directed acyclic graphs. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:920-925 [Conf]
  2. Po-Kuan Huang, Soheil Ghiasi
    Leakage-aware intraprogram voltage scaling for embedded processors. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:364-369 [Conf]
  3. Po-Kuan Huang, Soheil Ghiasi
    Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:943-944 [Conf]
  4. Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi, Majid Sarrafzadeh
    Incremental Timing Budget Management in Programmable Systems. [Citation Graph (0, 0)][DBLP]
    ERSA, 2004, pp:240-246 [Conf]
  5. Soheil Ghiasi, Hyun J. Moon, Majid Sarrafzadeh
    Collaborative and Reconfigurable Object Tracking. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:13-20 [Conf]
  6. Soheil Ghiasi, Hyun J. Moon, Majid Sarrafzadeh
    Improving Performance and Quality thru Hardware Reconfiguration: Potentials and Adaptive Object Tracking Case Study. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2003, pp:149-155 [Conf]
  7. Jia Ming Mar, Alessandro Bissacco, Stefano Soatto, Soheil Ghiasi
    High Performance Feature Detection on a Reconfigurable Co-Processor. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:341-342 [Conf]
  8. Soheil Ghiasi, Karlene Nguyen, Elaheh Bozorgzadeh, Majid Sarrafzadeh
    On computation and resource management in an FPGA-based computation environment. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:243- [Conf]
  9. Taraneh Taghavi, Soheil Ghiasi, Majid Sarrafzadeh
    Routing algorithms: enhancing routability & enabling ECO (abstract only). [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:266- [Conf]
  10. Soheil Ghiasi, Elaheh Bozorgzadeh, Siddharth Choudhuri, Majid Sarrafzadeh
    A unified theory of timing budget management. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2004, pp:653-659 [Conf]
  11. Soheil Ghiasi
    Efficient Implementation Selection via Time Budgeting Complexity Analysis and Leakage Optimization Case Study. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:127-129 [Conf]
  12. Taraneh Taghavi, Soheil Ghiasi, Abhishek Ranjan, Salil Raje, Majid Sarrafzadeh
    Innovate or perish: FPGA physical design. [Citation Graph (0, 0)][DBLP]
    ISPD, 2004, pp:148-155 [Conf]
  13. Soheil Ghiasi, Po-Kuan Huang
    Probabilistic Delay Budgeting for Soft Realtime Applications. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:141-146 [Conf]
  14. Eren Kursun, Soheil Ghiasi, Majid Sarrafzadeh
    Transistor Level Budgeting for Power Optimization. [Citation Graph (0, 0)][DBLP]
    ISQED, 2004, pp:116-121 [Conf]
  15. Roozbeh Jafari, Hyduke Noshadi, Majid Sarrafzadeh, Soheil Ghiasi
    Adaptive Medical Feature Extraction for Resource Constrained Distributed Embedded Systems. [Citation Graph (0, 0)][DBLP]
    PerCom Workshops, 2006, pp:506-511 [Conf]
  16. Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi, Majid Sarrafzadeh
    Optimal integer delay-budget assignment on directed acyclic graphs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:8, pp:1184-1199 [Journal]
  17. Soheil Ghiasi, Elaheh Bozorgzadeh, Po-Kuan Huang, Roozbeh Jafari, Majid Sarrafzadeh
    A Unified Theory of Timing Budget Management. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:11, pp:2364-2375 [Journal]
  18. Soheil Ghiasi, Ani Nahapetian, Majid Sarrafzadeh
    An optimal algorithm for minimizing run-time reconfiguration delay. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2004, v:3, n:2, pp:237-256 [Journal]
  19. Soheil Ghiasi, Hyun J. Moon, Ani Nahapetian, Majid Sarrafzadeh
    Collaborative and Reconfigurable Object Tracking. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2004, v:30, n:3, pp:213-238 [Journal]
  20. Xiaojian Yang, Maogang Wang, Ryan Kastner, Soheil Ghiasi, Majid Sarrafzadeh
    Congestion reduction during placement with provably good approximation bound. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2003, v:8, n:3, pp:316-333 [Journal]
  21. Roozbeh Jafari, Hyduke Noshadi, Soheil Ghiasi, Majid Sarrafzadeh
    Adaptive Electrocardiogram Feature Extraction on Distributed Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2006, v:17, n:8, pp:797-807 [Journal]
  22. Soheil Ghiasi, Po-Kuan Huang, Roozbeh Jafari
    Probabilistic delay budget assignment for synthesis of soft real-time applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:8, pp:843-853 [Journal]
  23. Po-Kuan Huang, Soheil Ghiasi
    Efficient and scalable compiler-directed energy optimization for realtime applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:785-790 [Conf]
  24. Taraneh Taghavi, Soheil Ghiasi, Majid Sarrafzadeh
    Routing algorithms: architecture driven rerouting enhancement for FPGAs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  25. Po-Kuan Huang, Matin Hashemi, Soheil Ghiasi
    Joint throughput and energy optimization for pipelined execution of embedded streaming applications. [Citation Graph (0, 0)][DBLP]
    LCTES, 2007, pp:137-139 [Conf]
  26. Roozbeh Jafari, Soheil Ghiasi, Majid Sarrafzadeh
    Medical Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IESS, 2007, pp:441-444 [Conf]
  27. Po-Kuan Huang, Soheil Ghiasi
    Efficient and scalable compiler-directed energy optimization for realtime applications. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:3, pp:- [Journal]
  28. Soheil Ghiasi
    An Effective Combinatorial Algorithm for Gate-Level Threshold Voltage Assignment. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:3, pp:365-377 [Journal]
  29. Soheil Ghiasi, Elaheh Bozorgzadeh, Karlene Nguyen, Majid Sarrafzadeh
    Efficient Timing Budget Management for Accuracy Improvement in a Collaborative Object Tracking System. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:42, n:1, pp:43-55 [Journal]

  30. Exact and Approximate Task Assignment Algorithms for Pipelined Software Synthesis. [Citation Graph (, )][DBLP]


  31. Incremental component implementation selection: enabling ECO in compositional system synthesis. [Citation Graph (, )][DBLP]


  32. Look into details: the benefits of fine-grain streaming buffer analysis. [Citation Graph (, )][DBLP]


  33. A programmable architecture for scalable and real-time network traffic measurements. [Citation Graph (, )][DBLP]


  34. System-Level Performance Estimation for Application-Specific MPSoC Interconnect Synthesis. [Citation Graph (, )][DBLP]


Search in 0.039secs, Finished in 0.040secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
Introduction Collection Based Clustering Ranking Paper Based Journals Conferences DB Status Statistics Search
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002