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Raj S. Mitra: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. David Brier, Raj S. Mitra
    Use of C/C++ models for architecture exploration and verification of DSPs. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:79-84 [Conf]
  2. Saurav Gorai, Saptarshi Biswas, Lovleen Bhatia, Praveen Tiwari, Raj S. Mitra
    Directed-simulation assisted formal verification of serial protocol and bridge. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:731-736 [Conf]
  3. Raj S. Mitra, Biswaroop Guha, Anupam Basu
    Rapid prototyping of microprocessor-based systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:600-603 [Conf]
  4. Anupam Basu, Raj S. Mitra, Peter Marwedel
    Interface Synthesis for Embedded Applications in a Co Design Environment. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1998, pp:85-90 [Conf]
  5. Anmol Mathur, Masahiro Fujita, M. Balakrishnan, Raj S. Mitra
    Sequential Equivalence Checking. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:18-19 [Conf]
  6. Raj S. Mitra, Bishnupriya Bhattacharya, Luciano Lavagno
    Asynchronous Implementation of Synchronous Esterel Specifications. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:348-355 [Conf]
  7. Raj S. Mitra, Mahmood G. Qadir, Anupam Basu
    A consistent labeling approach to hardware software partitioning. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1995, pp:19-24 [Conf]
  8. Raj S. Mitra, Partha S. Roop, Anupam Basu
    Implementation of design functions by available devices: a new algorithm. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1995, pp:30-35 [Conf]
  9. Debanjan Saha, Anupam Basu, Raj S. Mitra
    Hardware Software Partitioning Using Genetic Algorithm. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:155-160 [Conf]
  10. Praveen Tiwari, Saptarshi Biswas, Raj S. Mitra
    Apriori Formal Coverage Analysis for Protocol Properties. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:231-236 [Conf]
  11. Praveen Tiwari, Raj S. Mitra, Manu Chopra, Alok Jain
    Tutorial T4B: Formal Assertion-Based Verification in Industrial Setting. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:7- [Conf]
  12. Raj S. Mitra, Anupam Basu
    Hardware-Software Partitioning: A Case for Constraint Satisfaction. [Citation Graph (0, 0)][DBLP]
    IEEE Intelligent Systems, 2000, v:15, n:1, pp:54-63 [Journal]
  13. Lovleen Bhatia, Jayesh Gaur, Praveen Tiwari, Raj S. Mitra, Sunil H. Matange
    Leveraging Semi-Formal and Sequential Equivalence Techniques for Multimedia SOC Performance Validation. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:69-74 [Conf]
  14. Raj S. Mitra, Partha S. Roop, Anupam Basu
    A new algorithm for implementation of design functions by available devices. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:2, pp:170-180 [Journal]

  15. Strategies for mainstream usage of formal verification. [Citation Graph (, )][DBLP]

  16. Hybrid Verification of Protocol Bridges. [Citation Graph (, )][DBLP]

  17. Lessons and Experiences with High-Level Synthesis. [Citation Graph (, )][DBLP]

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