The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Richard Burch: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Richard Burch, Farid N. Najm, Ping Yang, Dale E. Hocevar
    Pattern-Independent Current Estimation for Reliability Analysis of CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1988, pp:294-299 [Conf]
  2. Richard Burch, Farid N. Najm, Ping Yang, Timothy N. Trick
    McPOWER: a Monte Carlo approach to power estimation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:90-97 [Conf]
  3. Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern, Richard Burch, Lawrence A. Arledge Jr., Paul F. Cox
    A Parallel Block-Diagonal Preconditioned Conjugate-Gradient Solution Algorithm for Circuit and Device Simulations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:446-449 [Conf]
  4. Richard Burch, Ping Yang, Paul F. Cox, Kartikeya Mayaram
    A new matrix solution technique for general circuit simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:2, pp:225-241 [Journal]
  5. Paul F. Cox, Richard Burch, Dale E. Hocevar, Ping Yang, Berton D. Epler
    Direct circuit simulation algorithms for parallel processing [VLSI]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:6, pp:714-725 [Journal]
  6. Paul F. Cox, Richard Burch, Ping Yang, Dale E. Hocevar
    New implicit integration method for efficient latency exploitation in circuit simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1051-1064 [Journal]
  7. Farid N. Najm, Richard Burch, Ping Yang, Ibrahim N. Hajj
    Probabilistic simulation for reliability analysis of CMOS VLSI circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:4, pp:439-450 [Journal]
  8. Richard Burch, Farid N. Najm, Ping Yang, Timothy N. Trick
    A Monte Carlo approach for power estimation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:1, pp:63-71 [Journal]

Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002