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Lawrence T. Clark: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yu Cao, Lawrence T. Clark
    Mapping statistical process variations toward circuit performance variability: an analytical modeling approach. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:658-663 [Conf]
  2. Giby Samson, Lawrence T. Clark
    Circuit architecture for low-power race-free programmable logic arrays. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:416-421 [Conf]
  3. Jinhui Chen, Lawrence T. Clark, Yu Cao
    Robust Design of High Fan-In/Out Subthreshold Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:405-410 [Conf]
  4. Lawrence T. Clark, Byungwoo Choi, Michael Wilkerson
    Reducing translation lookaside buffer active power. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:10-13 [Conf]
  5. Lawrence T. Clark, Neil Deutscher, Shay Demmons, Franco Ricci
    Standby power management for a 0.18µm microprocessor. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:7-12 [Conf]
  6. Lawrence T. Clark, Rakesh Patel, Timothy S. Beatty
    Managing standby and active mode leakage power in deep sub-micron design. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2004, pp:274-279 [Conf]
  7. Sayeed A. Badrudduza, Giby Samson, Lawrence T. Clark
    LCSRAM: A Leakage Controlled Six-transistor Static Random Access Memory Cell with Intrinsically High Read Stability. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:621-626 [Conf]
  8. V. Chaudhary, Lawrence T. Clark
    Low-power high-performance nand match line content addressable memories. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:8, pp:895-905 [Journal]
  9. Tai-Hua Chen, Jinhui Chen, Lawrence T. Clark
    Subthreshold to Above Threshold Level Shifter Design. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:2, pp:251-258 [Journal]
  10. Sayeed A. Badrudduza, Giby Samson, Lawrence T. Clark
    Static Random Access Memory Cells with Intrinsically High Read Stability and Low Standby Power. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:3, pp:412-424 [Journal]

  11. In-situ characterization and extraction of SRAM variability. [Citation Graph (, )][DBLP]

  12. Out-of-order issue logic using sorting networks. [Citation Graph (, )][DBLP]

  13. Low power fast and dense longest prefix match content addressable memory for IP routers. [Citation Graph (, )][DBLP]

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