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Seung-Moon Yoo: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Juan Antonio Carballo, Kevin J. Nowka, Seung-Moon Yoo, Ivan Vo, Clay Cranford, V. Robert Norman
Requirement-based design methods for adaptive communications links. [Citation Graph (0, 0)][DBLP]
DAC, 2004, pp:93-98 [Conf] - Edward Ahn, Seung-Moon Yoo, Sung-Mo Kang
Effective algorithms for cache-level compression. [Citation Graph (0, 0)][DBLP]
ACM Great Lakes Symposium on VLSI, 2001, pp:89-92 [Conf] - Chulwoo Kim, Seung-Moon Yoo, Sung-Mo Kang
NMOS Energy Recovery Logic. [Citation Graph (0, 0)][DBLP]
Great Lakes Symposium on VLSI, 1999, pp:310-313 [Conf] - Seung-Moon Yoo, Seong-Ook Jung, Sung-Mo Kang
2-level LFSR scheme with asynchronous test pattern transfer for low cost and high efficiency build-in-self-test. [Citation Graph (0, 0)][DBLP]
ACM Great Lakes Symposium on VLSI, 2001, pp:93-96 [Conf] - Seung-Moon Yoo, Seung-Moon Kang
A Bootstrapped NMOS Charge Recovery Logic. [Citation Graph (0, 0)][DBLP]
Great Lakes Symposium on VLSI, 1998, pp:30-33 [Conf] - Seung-Moon Yoo, Sung-Mo Kang
No-Race Charge-Recycling Differential Logic (NCDL). [Citation Graph (0, 0)][DBLP]
Great Lakes Symposium on VLSI, 1999, pp:202-205 [Conf] - Yi Kang, Wei Huang, Seung-Moon Yoo, Diana Keen, Zhenzhou Ge, Vinh Vi Lam, Josep Torrellas, Pratap Pattnaik
FlexRAM: Toward an Advanced Intelligent Memory System. [Citation Graph (0, 0)][DBLP]
ICCD, 1999, pp:192-201 [Conf] - Michael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas
Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips. [Citation Graph (0, 0)][DBLP]
Intelligent Memory Systems, 2000, pp:152-159 [Conf] - Seung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang
New current-mode sense amplifiers for high density DRAM and PIM architectures. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2001, pp:938-941 [Conf] - Seong-Ook Jung, Seung-Moon Yoo, Ki-Wook Kim, Sung-Mo Kang
Skew-tolerant high-speed (STHS) domino logic. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2001, pp:154-157 [Conf] - Seung-Moon Yoo, Seong-Ook Jung, Sung-Mo Kang
Low cost and high efficiency BIST scheme with 2-level LFSR and ATPT. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2001, pp:1-4 [Conf] - Seung-Moon Yoo, Sung-Mo Kang
CMOS Pass-gate No-race Charge-recycling Logic (CPNCL). [Citation Graph (0, 0)][DBLP]
ISCAS (1), 1999, pp:226-229 [Conf] - Juan Antonio Carballo, Jeffrey L. Burns, Seung-Moon Yoo, Ivan Vo, V. Robert Norman
A semi-custom voltage-island technique and its application to high-speed serial links. [Citation Graph (0, 0)][DBLP]
ISLPED, 2003, pp:60-65 [Conf] - Michael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas
L1 data cache decomposition for energy efficiency. [Citation Graph (0, 0)][DBLP]
ISLPED, 2001, pp:10-15 [Conf] - Michael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas
A framework for dynamic energy efficiency and temperature management. [Citation Graph (0, 0)][DBLP]
MICRO, 2000, pp:202-213 [Conf] - Michael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas
The Design of DEETM: a Framework for Dynamic Energy Efficiency and Temperature Management. [Citation Graph (0, 0)][DBLP]
J. Instruction-Level Parallelism, 2001, v:3, n:, pp:- [Journal]
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