SCEAS

The SCEAS System

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L. Richard Carley: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

L. Richard Carley, Georges G. E. Gielen, Rob A. Rutenbar, Willy M. C. Sansen
Synthesis Tools for Mixed-Signal ICs: Progress on Frontend and Backend Strategies. [Citation Graph (0, 0)][DBLP]
DAC, 1996, pp:298-303 [Conf]
Ramesh Harjani, Rob A. Rutenbar, L. Richard Carley
A Prototype Framework for Knowledge-Based Analog Circuit Synthesis. [Citation Graph (0, 0)][DBLP]
DAC, 1987, pp:42-49 [Conf]
Michael Krasnicki, Rodney Phelps, Rob A. Rutenbar, L. Richard Carley
MAELSTROM: Efficient Simulation-Based Synthesis for Custom Analog Cells. [Citation Graph (0, 0)][DBLP]
DAC, 1999, pp:945-950 [Conf]
Hongzhou Liu, Amith Singhee, Rob A. Rutenbar, L. Richard Carley
Remembrance of circuits past: macromodeling by data mining in large analog design spaces. [Citation Graph (0, 0)][DBLP]
DAC, 2002, pp:437-442 [Conf]
Prabir C. Maulik, L. Richard Carley, Rob A. Rutenbar
A Mixed-Integer Nonlinear Programming Approach to Analog Circuit Synthesis. [Citation Graph (0, 0)][DBLP]
DAC, 1992, pp:698-703 [Conf]
Emil S. Ochotta, Rob A. Rutenbar, L. Richard Carley
ASTRX/OBLX: Tools for Rapid Synthesis of High-Performance Analog Circuits. [Citation Graph (0, 0)][DBLP]
DAC, 1994, pp:24-30 [Conf]
Rodney Phelps, Michael Krasnicki, Rob A. Rutenbar, L. Richard Carley, James R. Hellums
A case study of synthesis for industrial-scale analog IP: redesign of the equalizer/filter frontend for an ADSL CODEC. [Citation Graph (0, 0)][DBLP]
DAC, 2000, pp:1-6 [Conf]
Gang Zhang, E. Aykut Dengi, Ronald A. Rohrer, Rob A. Rutenbar, L. Richard Carley
A synthesis flow toward fast parasitic closure for radio-frequency integrated circuits. [Citation Graph (0, 0)][DBLP]
DAC, 2004, pp:155-158 [Conf]
Bulent Basaran, Rob A. Rutenbar, L. Richard Carley
Latchup-aware placement and parasitic-bounded routing of custom analog cells. [Citation Graph (0, 0)][DBLP]
ICCAD, 1993, pp:415-421 [Conf]
John M. Cohn, David J. Garrod, Rob A. Rutenbar, L. Richard Carley
Techniques for Simultaneous Placement and Routing of Custom Analog Cells in KOAN/ANAGRAM II. [Citation Graph (0, 0)][DBLP]
ICCAD, 1991, pp:394-397 [Conf]
Michael Krasnicki, Rodney Phelps, James R. Hellums, Mark McClung, Rob A. Rutenbar, L. Richard Carley
ASF: A Practical Simulation-Based Methodology for the Synthesis of Custom Analog Circuits. [Citation Graph (0, 0)][DBLP]
ICCAD, 2001, pp:350-357 [Conf]
Sujoy Mitra, Sudip Nag, Rob A. Rutenbar, L. Richard Carley
System-level routing of mixed-signal ASICs in WREN. [Citation Graph (0, 0)][DBLP]
ICCAD, 1992, pp:394-399 [Conf]
Prabir C. Maulik, L. Richard Carley
Automating Analog Circuit Design using Constrained Optimization Techniques. [Citation Graph (0, 0)][DBLP]
ICCAD, 1991, pp:390-393 [Conf]
Tamal Mukherjee, L. Richard Carley, Rob A. Rutenbar
Synthesis of manufacturable analog circuits. [Citation Graph (0, 0)][DBLP]
ICCAD, 1994, pp:586-593 [Conf]
Joshua C. Park, Rohit Mittal, Kimberly C. Bracken, L. Richard Carley, David J. Allstot
High-Speed CMOS Current-Mode Equalizers. [Citation Graph (0, 0)][DBLP]
ISCAS, 1995, pp:1033-1036 [Conf]
Gang Zhang, L. Richard Carley
A CMOS-MEMS magnetic thin-film inductor for radio frequency and intermediate frequency filter circuits. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2004, pp:469-472 [Conf]
Jiangfeng Wu, L. Richard Carley
A simulation study of electromechanical delta-sigma modulators. [Citation Graph (0, 0)][DBLP]
ISCAS (3), 2001, pp:453-456 [Conf]
L. Richard Carley, Akshay Aggarwal
A completey on-chip voltage regulation technique for low power digital circuits. [Citation Graph (0, 0)][DBLP]
ISLPED, 1999, pp:109-111 [Conf]
L. Richard Carley, Akshay Aggarwal, Ram K. Krishnamurthy
Decreasing low-voltage manufacturing-induced delay variations with adaptive mixed-voltage-swing circuits. [Citation Graph (0, 0)][DBLP]
ISLPED, 1998, pp:106-108 [Conf]
L. Richard Carley, David F. Guillou, Suresh Santhanam
Fabrication and performance of mesa interconnect. [Citation Graph (0, 0)][DBLP]
ISLPED, 1996, pp:133-137 [Conf]
Nicola Dragone, Akshay Aggarwal, L. Richard Carley
An adaptive on-chip voltage regulation technique for low-power applications. [Citation Graph (0, 0)][DBLP]
ISLPED, 2000, pp:20-24 [Conf]
Ram K. Krishnamurthy, Ihor Lys, L. Richard Carley
Static power driven voltage scaling and delay driven buffer sizing in mixed swing QuadRail for sub-1V I/O swings. [Citation Graph (0, 0)][DBLP]
ISLPED, 1996, pp:381-386 [Conf]
Pascal C. H. Meier, Rob A. Rutenbar, L. Richard Carley
Inverse polarity techniques for high-speed/low-power multipliers. [Citation Graph (0, 0)][DBLP]
ISLPED, 1999, pp:264-266 [Conf]
Bharath Ramasubramanian, Herman Schmit, L. Richard Carley
Mixed-swing quadrail for low power dual-rail domino logic. [Citation Graph (0, 0)][DBLP]
ISLPED, 1999, pp:82-84 [Conf]
Rob A. Rutenbar, L. Richard Carley, Roberto Zafalon, Nicola Dragone
Low-power technology mapping for mixed-swing logic. [Citation Graph (0, 0)][DBLP]
ISLPED, 2001, pp:291-294 [Conf]
Mehmet Aktuna, Rob A. Rutenbar, L. Richard Carley
Device-level early floorplanning algorithms for RF circuits. [Citation Graph (0, 0)][DBLP]
ISPD, 1998, pp:57-64 [Conf]
L. Richard Carley
Presynaptic Neural Information Processing. [Citation Graph (0, 0)][DBLP]
NIPS, 1987, pp:154-163 [Conf]
L. Richard Carley, Gregory R. Ganger, David Nagle
MEMS-based integrated-circuit mass-storage systems. [Citation Graph (0, 0)][DBLP]
Commun. ACM, 2000, v:43, n:11, pp:72-80 [Journal]
Mehmet Aktuna, Rob A. Rutenbar, L. Richard Carley
Device-level early floorplanning algorithms for RF circuits. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:4, pp:375-388 [Journal]
Ramesh Harjani, Rob A. Rutenbar, L. Richard Carley
OASYS: a framework for analog circuit synthesis. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:12, pp:1247-1266 [Journal]
Prabir C. Maulik, L. Richard Carley, Rob A. Rutenbar
Integer programming based topology selection of cell-level analog circuits. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:4, pp:401-412 [Journal]
Tamal Mukherjee, L. Richard Carley, Rob A. Rutenbar
Efficient handling of operating range and manufacturing linevariations in analog cell synthesis. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:8, pp:825-839 [Journal]
Emil S. Ochotta, Rob A. Rutenbar, L. Richard Carley
Synthesis of high-performance analog circuits in ASTRX/OBLX. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:3, pp:273-294 [Journal]
Rodney Phelps, Michael Krasnicki, Rob A. Rutenbar, L. Richard Carley, James R. Hellums
Anaconda: simulation-based synthesis of analog circuits viastochastic pattern search. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:6, pp:703-717 [Journal]
Ram K. Krishnamurthy, L. Richard Carley
Exploring the design space of mixed swing quadrail for low-power digital circuits. [Citation Graph (0, 0)][DBLP]
IEEE Trans. VLSI Syst., 1997, v:5, n:4, pp:388-400 [Journal]
A Table-Based Time-Domain Simulation Method for Oversampled Microelectromechanical Systems. [Citation Graph (, )][DBLP]

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The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP