The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Willy M. C. Sansen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. L. Richard Carley, Georges G. E. Gielen, Rob A. Rutenbar, Willy M. C. Sansen
    Synthesis Tools for Mixed-Signal ICs: Progress on Frontend and Backend Strategies. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:298-303 [Conf]
  2. Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
    An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:431-436 [Conf]
  3. Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
    Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:958-963 [Conf]
  4. Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen
    Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:25-30 [Conf]
  5. Koen Lampaert, Georges G. E. Gielen, Willy M. C. Sansen
    Direct Performance-Driven Placement of Mismatch-Sensitive Analog Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:445-449 [Conf]
  6. Geert Van der Plas, Jan Vandenbussche, Walter Daems, Antal van den Bosch, Georges G. E. Gielen, Willy M. C. Sansen
    Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:452-457 [Conf]
  7. Carl De Ranter, B. De Muer, Geert Van der Plas, Peter J. Vancorenland, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen
    CYCLONE: automated design and layout of RF LC-oscillators. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:11-14 [Conf]
  8. Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
    Behavioral modeling of (coupled) harmonic oscillators. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:536-541 [Conf]
  9. Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
    A Fitting Approach to Generate Symbolic Expressions for Linear and Nonlinear Analog Circuit Performance Characteristics. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:268-273 [Conf]
  10. Tom Eeckelaert, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
    Generalized Posynomial Performance Modeling. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10250-10255 [Conf]
  11. Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
    Efficient time-domain simulation of telecom frontends using a complex damped exponential signal model. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:169-175 [Conf]
  12. Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
    Constructing Symbolic Models for the Input/Output Behavior of Periodically Time-Varying Systems Using Harmonic Transfer Matrices. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:279-284 [Conf]
  13. Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
    Time-Varying, Frequency-Domain Modeling and Analysis of Phase-Locked Loops with Sampling Phase-Frequency Detectors. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10238-10243 [Conf]
  14. Jan Vandenbussche, Stéphane Donnay, Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen
    Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:716-720 [Conf]
  15. Stéphane Donnay, Koen Swings, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts
    A Methodology for Analog Design Automation in Mixed-Signal ASICs. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:530-534 [Conf]
  16. Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
    Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:70-74 [Conf]
  17. Georges G. E. Gielen, Zhihua Wang, Willy M. C. Sansen
    Fault detection and input stimulus determination for the testing of analog integrated circuits based on power-supply current monitoring. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:495-498 [Conf]
  18. Francky Leyn, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
    A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:374-381 [Conf]
  19. Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen
    An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:304-307 [Conf]
  20. Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
    On the difference between two widely publicized methods for analyzing oscillator phase behavior. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2002, pp:229-233 [Conf]
  21. Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
    A Generalized Method for Computing Oscillator Phase Noise Spectra. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:247-250 [Conf]
  22. Peter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen
    A Layout-Aware Synthesis Methodology for RF Circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:358-0 [Conf]
  23. Francisco V. Fernández, Georges G. E. Gielen, Lawrence Huelsman, Agnieszka Konczykowska, Stefano Manetti, Willy M. C. Sansen, Jiri Vlach
    Pleasures, Perils and Pitfalls of Symbolic Analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:451-457 [Conf]
  24. Francisco V. Fernández, Piet Wambacq, Georges G. E. Gielen, Ángel Rodríguez-Vázquez, Willy M. C. Sansen
    Symbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:25-28 [Conf]
  25. Georges G. E. Gielen, Geert Debyser, Piet Wambacq, Koen Swings, Willy M. C. Sansen
    Use of Symbolic Analysis in Analog Circuit Synthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:2205-2208 [Conf]
  26. Georges G. E. Gielen, Willy M. C. Sansen
    Modeling of the Power-supply Interactions of CMOS Operational Amplifiers Using Symbolic Computation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1381-1384 [Conf]
  27. Michiel Steyaert, Jan Crols, S. Gogaert, Willy M. C. Sansen
    Low-voltage Analog CMOS Filter Design. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1447-1450 [Conf]
  28. Zhihua Wang, Georges G. E. Gielen, Willy M. C. Sansen
    A Novel Method for the Fault Detection of Analog Integrated Circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:347-350 [Conf]
  29. Francky Leyn, Erik Lauwers, Martin Vogels, Georges G. E. Gielen, Willy M. C. Sansen
    Regression criteria and their application in different modeling cases. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:85-8 [Conf]
  30. Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
    Circuit simplification for the symbolic analysis of analogintegrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:4, pp:395-407 [Journal]
  31. Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
    Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:5, pp:517-534 [Journal]
  32. Manuel Innocent, Piet Wambacq, Stéphane Donnay, Harrie A. C. Tilmans, Willy M. C. Sansen, Hugo De Man
    An analytic Volterra-series-based model for a MEMS variable capacitor. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:2, pp:124-131 [Journal]
  33. Geert Van der Plas, Geert Debyser, Francky Leyn, Koen Lampaert, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen, Petar Veselinovic, Domine Leenaerts
    AMGIE-A synthesis environment for CMOS analog integrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:9, pp:1037-1058 [Journal]
  34. Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen
    A layout synthesis methodology for array-type analog blocks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:6, pp:645-661 [Journal]
  35. Carl De Ranter, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen
    CYCLONE: automated design and layout of RF LC-oscillators. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:10, pp:1161-1170 [Journal]
  36. Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
    Symbolic modeling of periodically time-varying systems usingharmonic transfer matrices. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:9, pp:1011-1024 [Journal]
  37. Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
    Behavioral modeling of (coupled) harmonic oscillators. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:8, pp:1017-1026 [Journal]
  38. Paul J. V. Vandeloo, Willy M. C. Sansen
    Modeling of the MOS transistor for high frequency analog design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:7, pp:713-723 [Journal]
  39. Zhihua Wang, Georges G. E. Gielen, Willy M. C. Sansen
    Probabilistic fault detection and the selection of measurements for analog integrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:9, pp:862-872 [Journal]
  40. A. Marques, Michiel Steyaert, Willy M. C. Sansen
    Theory of PLL fractional-N frequency synthesizers. [Citation Graph (0, 0)][DBLP]
    Wireless Networks, 1998, v:4, n:1, pp:79-85 [Journal]
  41. Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen
    An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:81-86 [Conf]
  42. Raf Schoofs, Michiel Steyaert, Willy M. C. Sansen
    A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  43. High-level synthesis of analog sensor interface front-ends. [Citation Graph (, )][DBLP]


  44. An intelligent design system for analogue integrated circuits. [Citation Graph (, )][DBLP]


  45. Analog IC Design in Nanometer CMOS Technologies. [Citation Graph (, )][DBLP]


  46. Identifying the Bottlenecks to the RF Performance of FinFETs. [Citation Graph (, )][DBLP]


Search in 0.122secs, Finished in 0.125secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002