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Lovic Gauthier :
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Wander O. Cesário , Amer Baghdadi , Lovic Gauthier , Damien Lyonnard , Gabriela Nicolescu , Yanick Paviot , Sungjoo Yoo , Ahmed Amine Jerraya , Mario Diaz-Nava Component-based design approach for multicore SoCs. [Citation Graph (0, 0)][DBLP ] DAC, 2002, pp:789-794 [Conf ] Lovic Gauthier , Ahmed Amine Jerraya Cycle-True Simulation of the ST10 Microcontroller. [Citation Graph (0, 0)][DBLP ] DATE, 2000, pp:742- [Conf ] Lovic Gauthier , Sungjoo Yoo , Ahmed Amine Jerraya Automatic generation and targeting of application specific operating systems and embedded systems software. [Citation Graph (0, 0)][DBLP ] DATE, 2001, pp:679-685 [Conf ] Sungjoo Yoo , Gabriela Nicolescu , Lovic Gauthier , Ahmed Amine Jerraya Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design. [Citation Graph (0, 0)][DBLP ] DATE, 2002, pp:620-627 [Conf ] Nacer-Eddine Zergainoh , Amer Baghdadi , Ludovic Tambour , Damien Lyonnard , Lovic Gauthier , Ahmed Amine Jerraya Framework for System Design, Validation and Fast Prototyping of Multiprocessor System-On-Chip. [Citation Graph (0, 0)][DBLP ] DIPES, 2000, pp:99-110 [Conf ] Lovic Gauthier , Ahmed Amine Jerraya Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2000, pp:60-65 [Conf ] Wander O. Cesário , Gabriela Nicolescu , Lovic Gauthier , Damien Lyonnard , Ahmed Amine Jerraya Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2001, pp:110-115 [Conf ] Victor M. Goulart Ferreira , Lovic Gauthier , Takayuki Kando , Takuma Matsuo , Toshihiko Hashinaga , Kazuaki Murakami REDEFIS: a system with a redefinable instruction set processor. [Citation Graph (0, 0)][DBLP ] SBCCI, 2006, pp:14-19 [Conf ] Wander O. Cesário , Damien Lyonnard , Gabriela Nicolescu , Yanick Paviot , Sungjoo Yoo , Ahmed Amine Jerraya , Lovic Gauthier , Mario Diaz-Nava Multiprocessor SoC Platforms: A Component-Based Design Approach. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:52-63 [Journal ] Wander O. Cesário , Gabriela Nicolescu , Lovic Gauthier , Damien Lyonnard , Ahmed Amine Jerraya Colif: A Design Representation for Application-Specific Multiprocessor SOCs. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2001, v:18, n:5, pp:8-20 [Journal ] Wander O. Cesário , Lovic Gauthier , Damien Lyonnard , Gabriela Nicolescu , Ahmed Amine Jerraya Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits. [Citation Graph (0, 0)][DBLP ] Journal of Systems and Software, 2004, v:70, n:3, pp:229-244 [Journal ] Lovic Gauthier , Sungjoo Yoo , Ahmed Amine Jerraya Automatic generation and targeting of application-specificoperating systems and embedded systems software. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:11, pp:1293-1301 [Journal ] Gabriela Nicolescu , Kjetil Svarstad , Wander O. Cesário , Lovic Gauthier , Damien Lyonnard , Sungjoo Yoo , P. Coste , Ahmed Amine Jerraya Desiderata pour la spécification et la conception des systèmes électroniques. [Citation Graph (0, 0)][DBLP ] Technique et Science Informatiques, 2002, v:21, n:3, pp:291-314 [Journal ] Optimal stack frame placement and transfer for energy reduction targeting embedded processors with scratch-pad memories. [Citation Graph (, )][DBLP ] Accelerating Cryptographic Applications Using Dynamically Reconfigurable Functional Units. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.002secs