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Yao-Ping Chen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chung-Ping Chen, Yao-Ping Chen, D. F. Wong
    Optimal Wire-Sizing Formular Under the Elmore Delay Model. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:487-490 [Conf]
  2. Yao-Ping Chen, D. F. Wong
    On Retiming for FPGA Logic Module Minimization. [Citation Graph (0, 0)][DBLP]
    ICCD, 1994, pp:394-397 [Conf]
  3. Ashih D. Mehta, Yao-Ping Chen, Noel Menezes, D. F. Wong, Lawrence T. Pileggi
    Clustering and Load Balancing for Buffered Clock Tree Synthesis. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:217-223 [Conf]
  4. Yao-Ping Chen, D. F. Wong
    On optimal approximation of orthogonal polygons. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:2533-2536 [Conf]
  5. Yao-Ping Chen, D. F. Wong
    A Graph Theoretic Approach to Feed-Through Pin Assignment. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:1687-1690 [Conf]
  6. Yao-Ping Chen, Ting-Chi Wang, D. F. Wong
    A Graph Partitioning Problem for Multiple-chip Design. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1778-1781 [Conf]

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