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Chau-Shen Chen:
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Publications of Author
- Chau-Shen Chen, TingTing Hwang, C. L. Liu
Low Power FPGA Design - A Re-engineering Approach. [Citation Graph (0, 0)][DBLP] DAC, 1997, pp:656-661 [Conf]
- Chau-Shen Chen, Kuang-Hui Lin, TingTing Hwang
Layout Driven Selecting and Chaining of Partial Scan. [Citation Graph (0, 0)][DBLP] DAC, 1996, pp:262-267 [Conf]
- Chau-Shen Chen, TingTing Hwang, C. L. Liu
Architecture driven circuit partitioning. [Citation Graph (0, 0)][DBLP] ICCAD, 1998, pp:408-411 [Conf]
- Chau-Shen Chen, Yu-Wen Tsay, TingTing Hwang, Allen C.-H. Wu, Youn-Long Lin
Combining technology mapping and placement for delay-optimization in FPGA designs. [Citation Graph (0, 0)][DBLP] ICCAD, 1993, pp:123-127 [Conf]
- Chau-Shen Chen, Yu-Wen Tsay, TingTing Hwang, Allen C.-H. Wu, Youn-Long Lin
Combining technology mapping and placement for delay-minimization in FPGA designs. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:9, pp:1076-1084 [Journal]
- Chau-Shen Chen, TingTing Hwang, C. L. Liu
Architecture driven circuit partitioning. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2001, v:9, n:2, pp:383-389 [Journal]
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