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Publications of Author

1. Yi-Kan Cheng, Chin-Chi Teng, Abhijit Dharchoudhury, Elyse Rosenbaum, Sung-Mo Kang
   iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips. [Citation Graph (0, 0)][DBLP]
   DAC, 1996, pp:548-551 [Conf]
   
2. Rouwaida Kanj, Timothy Lehner, Bhavna Agrawal, Elyse Rosenbaum
   Noise characterization of static CMOS gates. [Citation Graph (0, 0)][DBLP]
   DAC, 2004, pp:888-893 [Conf]
   
3. Tong Li, Ching-Han Tsai, Elyse Rosenbaum, Sung-Mo Kang
   Substrate Modeling and Lumped Substrate Resistance Extraction for CMOS ESD/Latchup Circuit Simulation. [Citation Graph (0, 0)][DBLP]
   DAC, 1999, pp:549-554 [Conf]
   
4. Chin-Chi Teng, Yi-Kan Cheng, Elyse Rosenbaum, Sung-Mo Kang
   Hierarchical Electromigration Reliability Diagnosis for VLSI Interconnects. [Citation Graph (0, 0)][DBLP]
   DAC, 1996, pp:752-757 [Conf]
   
5. Hongmei Li, Jorge Carballido, Harry H. Yu, Vladimir I. Okhmatovski, Elyse Rosenbaum, Andreas C. Cangellaris
   Comprehensive frequency-dependent substrate noise analysis using boundary element methods. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2002, pp:2-9 [Conf]
   
6. Elyse Rosenbaum, Sami Hyvonen
   On-chip ESD protection for RF I/Os: devices, circuits and models. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2005, pp:1202-1205 [Conf]
   
7. Rouwaida Kanj, Elyse Rosenbaum
   A critical look at design guidelines for SOI logic gates. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2002, pp:261-264 [Conf]
   
8. Danqing Chen, Erhong Li, Elyse Rosenbaum, Sung-Mo Kang
   Interconnect thermal modeling for determining design limits on current density. [Citation Graph (0, 0)][DBLP]
   ISPD, 1999, pp:172-178 [Conf]
   
9. Danqing Chen, Erhong Li, Elyse Rosenbaum, Sung-Mo Kang
   Interconnect thermal modeling for accurate simulation of circuittiming and reliability. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:2, pp:197-205 [Journal]
   
10. Yi-Kan Cheng, Prasun Raha, Chin-Chi Teng, Elyse Rosenbaum, Sung-Mo Kang
    ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:8, pp:668-681 [Journal]
    
11. Hongmei Li, Cole E. Zemke, Giorgos Manetas, Vladimir I. Okhmatovski, Elyse Rosenbaum, Andreas C. Cangellaris
    An automated and efficient substrate noise analysis tool. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:3, pp:454-468 [Journal]
    
12. Chin-Chi Teng, Yi-Kan Cheng, Elyse Rosenbaum, Sung-Mo Kang
    iTEM: a temperature-dependent electromigration reliability diagnosis tool. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:8, pp:882-893 [Journal]
    
13. Robert H. Tu, Elyse Rosenbaum, Wilson Y. Chan, Chester C. Li, Eric Minami, Khandker Quader, Ping K. Ko, Chenming Hu
    Berkeley reliability tools-BERT. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:10, pp:1524-1534 [Journal]
    
14. Rouwaida Kanj, Elyse Rosenbaum
    Critical evaluation of SOI design guidelines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:9, pp:885-894 [Journal]
    
15. Elyse Rosenbaum, Jie Wu
    Trap generation and breakdown processes in very thin gate oxides. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:5, pp:625-632 [Journal]
    
16. Yu Wang, Patrick Juliano, Sopan Joshi, Elyse Rosenbaum
    Electrothermal model for simulation of bulk-Si and SOI diodes in ESD protection circuits. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:11, pp:1781-1787 [Journal]
    
17. Jie Wu, Patrick Juliano, Elyse Rosenbaum
    Breakdown and latent damage of ultra-thin gate oxides under ESD stress conditions. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:11, pp:1771-1779 [Journal]
    
18. Sopan Joshi, Elyse Rosenbaum
    Simulator-independent compact modeling of vertical npn transistors for ESD and RF circuit simulation. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2003, v:43, n:7, pp:1021-1027 [Journal]
    
19. Sami Hyvonen, Sopan Joshi, Elyse Rosenbaum
    Comprehensive ESD protection for RF inputs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:2, pp:245-254 [Journal]