The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Robert W. Dutton: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Goodwin R. Chin, Walter C. Dietrich Jr., Duane S. Boning, Alexander S. Wong, Andrew R. Neureuther, Robert W. Dutton
    Linking TCAD to EDA - Benefits and Issues. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:573-578 [Conf]
  2. Lu Sha, Robert W. Dutton
    An analytical algorithm for placement of arbitrarily sized rectangular blocks. [Citation Graph (0, 0)][DBLP]
    DAC, 1985, pp:602-608 [Conf]
  3. Hai Lan, Robert W. Dutton
    Synthesized Compact Models (SCM) of Substrate Noise Coupling Analysis and Synthesis in Mixed-Signal ICs. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:836-843 [Conf]
  4. Andreas Kuehlmann, Robert W. Dutton, Paul D. Franzon, Seth Copen Goldstein, Philip Luekes, Eric Parker, Thomas N. Theis
    Will Nanotechnology Change the Way We Design and Verify Systems? (Panel). [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:174- [Conf]
  5. Boris Troyanovsky, Zhiping Yu, Lydia So, Robert W. Dutton
    Relaxation-based harmonic balance technique for semiconductor device simulation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:700-703 [Conf]
  6. Choshu Ito, Kaustav Banerjee, Robert W. Dutton
    Analysis and Design of ESD Protection Circuits for High-Frequency/RF Applications. [Citation Graph (0, 0)][DBLP]
    ISQED, 2001, pp:117-122 [Conf]
  7. Hai Lan, Zhiping Yu, Robert W. Dutton
    A CAD-Oriented Modeling Approach of Frequency-Dependent Behavior of Substrate Noise Coupling for Mixed-Signal IC Design. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:195-0 [Conf]
  8. Tae-young Oh, Zhiping Yu, Robert W. Dutton
    AC Analysis of Thin Gate Oxide MOS with Quantum Mechanical Corrections. [Citation Graph (0, 0)][DBLP]
    ISQED, 2002, pp:326-330 [Conf]
  9. Zhiping Yu, Dan Yergeau, Robert W. Dutton, Sam Nakagawa, Norman Chang, Shen Lin, Weize Xie
    Full Chip Thermal Simulation. [Citation Graph (0, 0)][DBLP]
    ISQED, 2000, pp:145-150 [Conf]
  10. Georgios Veronis, Yi-Chang Lu, Robert W. Dutton
    Modeling of Wave Behavior of Substrate Noise Coupling for Mixed-Signal IC Design. [Citation Graph (0, 0)][DBLP]
    ISQED, 2004, pp:303-308 [Conf]
  11. Gaofeng Wang, Xiaoning Qi, Zhiping Yu, Robert W. Dutton
    Accurate Model of Metal-Insulator-Semiconductor Interconnects. [Citation Graph (0, 0)][DBLP]
    ISQED, 2002, pp:48-52 [Conf]
  12. Nathan Wilson, Kenneth Wang, Robert W. Dutton, Charles Taylor
    A Software Framework for Creating Patient Specific Geometric Models from Medical Imaging Data for Simulation Based Medical Planning of Vascular Surgery. [Citation Graph (0, 0)][DBLP]
    MICCAI, 2001, pp:449-456 [Conf]
  13. Bruce P. Herndon, Narayan R. Aluru, Arthur Raefsky, Ronald J. G. Goossens, Kincho H. Law, Robert W. Dutton
    A Methodology for Parallelizing PDE Solvers: Application to Semiconductor Device Simulation. [Citation Graph (0, 0)][DBLP]
    PPSC, 1995, pp:239-240 [Conf]
  14. Edward K. Chan, Krishna Garikipati, Robert W. Dutton
    Comprehensive Static Characterization of Vertical Electrostatically Actuated Polysilicon Beams. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:4, pp:58-65 [Journal]
  15. Narayan R. Aluru, Kincho H. Law, Robert W. Dutton
    Simulation of the hydrodynamic device model on distributed memory parallel computers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:9, pp:1029-1047 [Journal]
  16. N. N. Chan, Robert W. Dutton
    Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:2, pp:143-149 [Journal]
  17. Datong Chen, Satoshi Sugino, Zhiping Yu, Robert W. Dutton
    Modeling of the charge balance condition on floating gates and simulation of EEPROMs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:10, pp:1499-1502 [Journal]
  18. D. Y. Cheng, J. T. Deutsch, Robert W. Dutton
    'Defensive programming' in the rapid development of a parallel scientific program. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:6, pp:665-669 [Journal]
  19. D. Y. Cheng, Chang G. Hwang, Robert W. Dutton
    PISCES-MC: a multiwindow, multimethod 2-D device simulator. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:9, pp:1017-1026 [Journal]
  20. Robert W. Dutton, Andrzej J. Strojwas
    Perspectives on technology and technology-driven CAD. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:12, pp:1544-1560 [Journal]
  21. Donald B. Estreich, Robert W. Dutton
    Modeling Latch-Up in CMOS Integrated Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1982, v:1, n:4, pp:157-162 [Journal]
  22. Ronald J. G. Goossens, Stephen G. Beebe, Zhiping Yu, Robert W. Dutton
    An automatic biasing scheme for tracing arbitrarily shaped I-V curves. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:3, pp:310-317 [Journal]
  23. Mark Horowitz, Robert W. Dutton
    Resistance Extraction from Mask Layout Data. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1983, v:2, n:3, pp:145-150 [Journal]
  24. Chang G. Hwang, Robert W. Dutton
    Hot carrier transport effect in Schottky-barrier diode grown by MBE. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:5, pp:578-583 [Journal]
  25. Chang G. Hwang, Robert W. Dutton
    Improved physical modeling of submicron MOSFETs based on parameter extraction using 2-D simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:4, pp:370-379 [Journal]
  26. Sun Young Hwang, Robert W. Dutton, Tom Blank
    A Best-First Search Algorithm for Optimal PLA Folding. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:3, pp:433-442 [Journal]
  27. Hiroshi Iwai, Mark R. Pinto, Conor S. Rafferty, J. E. Oristian, Robert W. Dutton
    Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:2, pp:173-184 [Journal]
  28. Lee-Sup Kim, Robert W. Dutton
    Modeling of the distributed gate RC effect in MOSFET's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:12, pp:1365-1367 [Journal]
  29. James B. Kuo, G. P. Rosseel, Robert W. Dutton
    Two-dimensional analysis of a merged BiPMOS device. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:8, pp:929-932 [Journal]
  30. James B. Kuo, Tsen-Shau Yang, Robert W. Dutton, Bruce A. Wooley
    Two-dimensional transient analysis of a collector-up ECL inverter. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1038-1045 [Journal]
  31. Mark E. Law, Robert W. Dutton
    Verification of analytic point defect models using SUPREM-IV [dopant diffusion]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:2, pp:181-190 [Journal]
  32. Michael R. Kump, Robert W. Dutton
    The efficient simulation of coupled point defect and impurity diffusion. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:2, pp:191-204 [Journal]
  33. Vered Marash, Robert W. Dutton
    Methodology for submicron device model development. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:2, pp:299-306 [Journal]
  34. Conor S. Rafferty, Mark R. Pinto, Robert W. Dutton
    Iterative Methods in Semiconductor Device Simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:4, pp:462-471 [Journal]
  35. Enrico Sangiorgi, Mark R. Pinto, Stanley E. Swirhun, Robert W. Dutton
    Two-Dimensional Numerical Analysis of Latchup in a VLSI CMOS Technology. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:4, pp:561-574 [Journal]
  36. Edward W. Scheckler, Alexander S. Wong, Robert K. Wang, Goodwin R. Chin, John R. Camagna, Andrew R. Neureuther, Robert W. Dutton
    A utility-based integrated system for process simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:7, pp:911-920 [Journal]
  37. Chiaki Takano, Zhiping Yu, Robert W. Dutton
    A nonequilibrium one-dimensional quantum-mechanical simulation for AlGaAs/GaAs HEMT structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:11, pp:1217-1224 [Journal]
  38. Ze-Yi Wang, Ke-Chih Wu, Robert W. Dutton
    An approach to construct pre-conditioning matrices for block iteration of linear equations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:11, pp:1334-1343 [Journal]
  39. Wayne Wolf, Robert G. Mathews, John A. Newkirk, Robert W. Dutton
    Algorithms for optimizing, two-dimensional symbolic layout compaction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:4, pp:451-466 [Journal]
  40. Ke-Chih Wu, Goodwin R. Chin, Robert W. Dutton
    A STRIDE towards practical 3-D device simulation-numerical and visualization considerations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:9, pp:1132-1140 [Journal]
  41. Ke-Chi Wu, Robert F. Lucas, Ze-Yi Wang, Robert W. Dutton
    New approaches in a 3-D one-carrier device solver. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:528-537 [Journal]
  42. Zhiping Yu, Robert W. Dutton, Massimo Vanzi
    An Extension to Newton's Method in Device Simulators--On An Efficient Algorithm to Evaluate Small-Signal Parameters and to Predict Initial Guess. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:1, pp:41-45 [Journal]
  43. Hal R. Yeager, Robert W. Dutton
    An Approach to Solving Multiparticle Diffusion Exhibiting Nonlinear Stiff Coupling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:4, pp:408-420 [Journal]
  44. Hal R. Yeager, Robert W. Dutton
    Improvement in norm-reducing Newton methods for circuit simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:538-546 [Journal]
  45. Tze Wee Chen, Choshu Ito, William Loh, Robert W. Dutton
    Post-breakdown leakage resistance and its dependence on device area. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2006, v:46, n:9-11, pp:1612-1616 [Journal]
  46. Reza Navid, Thomas H. Lee, Robert W. Dutton
    A Circuit-Based Noise Parameter Extraction Technique for MOSFETs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3347-3350 [Conf]

  47. Optimized self-tuning for circuit aging. [Citation Graph (, )][DBLP]


  48. Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs. [Citation Graph (, )][DBLP]


  49. Hybrid Integration of Bandgap Reference Circuits Using Silicon ICs and Germanium Devices. [Citation Graph (, )][DBLP]


Search in 0.391secs, Finished in 0.394secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002