|
Search the dblp DataBase
Mauro Chinosi:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Mauro Chinosi, Roberto Zafalon, Carlo Guardiani
Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning. [Citation Graph (0, 0)][DBLP] DAC, 1999, pp:562-567 [Conf]
- Loris Navoni, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Alan Kramer, Pier Luigi Rolandi
Words Recognition using Associative Memory. [Citation Graph (0, 0)][DBLP] ICDAR, 1997, pp:97-101 [Conf]
- Mauro Chinosi, Roberto Zafalon, Carlo Guardiani
Automatic characterization and modeling of power consumption in static RAMs. [Citation Graph (0, 0)][DBLP] ISLPED, 1998, pp:112-114 [Conf]
- Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. Doise, Giovanni Gozzini, Pier Luigi Rolandi, M. Sabatini, P. Zabberoni
Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors. [Citation Graph (0, 0)][DBLP] ISLPD, 1995, pp:203-208 [Conf]
- Manuela Anton, Mauro Chinosi, Daniele Sirtori, Roberto Zafalon
Architectural Design Space Exploration Achieved through Innovative RTL Power Estimation Techniques. [Citation Graph (0, 0)][DBLP] PATMOS, 2000, pp:3-13 [Conf]
Search in 0.001secs, Finished in 0.001secs
|