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Publications of Author

1. Amit Chowdhary, Karthik Rajagopal, Satish Venkatesan, Tung Cao, Vladimir Tiourin, Yegna Parasuram, Bill Halpin
   How accurately can we model timing in a placement engine? [Citation Graph (0, 0)][DBLP]
   DAC, 2005, pp:801-806 [Conf]
   
2. Sung-Woo Hur, Tung Cao, Karthik Rajagopal, Yegna Parasuram, Amit Chowdhary, Vladimir Tiourin, Bill Halpin
   Force directed mongrel with physical net constraints. [Citation Graph (0, 0)][DBLP]
   DAC, 2003, pp:214-219 [Conf]
   
3. Amit Chowdhary, John P. Hayes
   General Modeling and Technology-Mapping Technique for LUT-Based FPGAs. [Citation Graph (0, 0)][DBLP]
   FPGA, 1997, pp:43-49 [Conf]
   
4. Amit Chowdhary, John P. Hayes
   Technology mapping for field-programmable gate arrays using integer programming. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1995, pp:346-352 [Conf]
   
5. Amit Chowdhary, Sudhakar Kale, Phani K. Saripella, Naresh Sehgal, Rajesh K. Gupta
   A general approach for regularity extraction in datapath circuits. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1998, pp:332-339 [Conf]
   
6. Karthik Rajagopal, Tal Shaked, Yegna Parasuram, Tung Cao, Amit Chowdhary, Bill Halpin
   Timing driven force directed placement with physical net constraints. [Citation Graph (0, 0)][DBLP]
   ISPD, 2003, pp:60-66 [Conf]
   
7. Sherief Reda, Amit Chowdhary
   Effective linear programming based placement methods. [Citation Graph (0, 0)][DBLP]
   ISPD, 2006, pp:186-191 [Conf]
   
8. Amit Chowdhary, Dinesh Bhatia
   Detailed Routing of Multi-Terminal Nets in FPGAs. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 1994, pp:237-242 [Conf]
   
9. Amit Chowdhary, Rajesh K. Gupta
   A Methodology for Synthesis of Data Path Circuitse. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2002, v:19, n:6, pp:90-100 [Journal]
   
10. Amit Chowdhary, John P. Hayes
    Area-optimal technology mapping for field-programmable gate arrays based on lookup tables. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:7, pp:999-1013 [Journal]
    
11. Amit Chowdhary, Sudhakar Kale, Phani K. Saripella, Naresh Sehgal, Rajesh K. Gupta
    Extraction of functional regularity in datapath circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:9, pp:1279-1296 [Journal]
    
12. Amit Chowdhary, John P. Hayes
    General technology mapping for field-programmable gate arrays based on lookup tables. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:1, pp:1-32 [Journal]