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Kwok-Shing Leung: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jason Cong, Kwok-Shing Leung, Dian Zhou
    Performance-Driven Interconnect Design Based on Distributed RC Delay Model. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:606-611 [Conf]
  2. Jason Cong, Kwok-Shing Leung
    Optimal wiresizing under the distributed Elmore delay model. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:634-639 [Conf]
  3. Kwok-Shing Leung
    SPIDER: simultaneous post-layout IR-drop and metal density enhancement with redundant fill. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:33-38 [Conf]
  4. Peter A. Dinda, Brad M. Garcia, Kwok-Shing Leung
    The Measured Network Traffic of Compiler-Parallelized Programs. [Citation Graph (0, 0)][DBLP]
    ICPP, 2001, pp:175-184 [Conf]
  5. Jason Cong, Cheng-Kok Koh, Kwok-Shing Leung
    Simultaneous buffer and wire sizing for performance and power optimization. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:271-276 [Conf]
  6. Jason Cong, Andrew B. Kahng, Kwok-Shing Leung
    Efficient heuristics for the minimum shortest path Steiner arborescence problem with applications to VLSI physical design. [Citation Graph (0, 0)][DBLP]
    ISPD, 1997, pp:88-95 [Conf]
  7. Jason Cong, Andrew B. Kahng, Kwok-Shing Leung
    Efficient algorithms for the minimum shortest path Steiner arborescence problem with applications to VLSI physical design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:1, pp:24-39 [Journal]
  8. Jason Cong, Kwok-Shing Leung
    Optimal wiresizing under Elmore delay model. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:3, pp:321-336 [Journal]

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