|
Search the dblp DataBase
Marcello Dalpasso:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Marcello Dalpasso, Alessandro Bogliolo, Luca Benini
Hardware/software IP protection. [Citation Graph (0, 0)][DBLP] DAC, 2000, pp:593-596 [Conf]
- Marcello Dalpasso, Alessandro Bogliolo, Luca Benini
Virtual Simulation of Distributed IP-based Designs. [Citation Graph (0, 0)][DBLP] DAC, 1999, pp:50-55 [Conf]
- Marcello Dalpasso, Alessandro Bogliolo, Luca Benini
Specification and Validation of Distributed IP-Based Designs with JavaCAD. [Citation Graph (0, 0)][DBLP] DATE, 1999, pp:684-688 [Conf]
- Marcello Dalpasso, Alessandro Bogliolo, Luca Benini, Michele Favalli
Virtual Fault Simulation of Distributed IP-Based Designs. [Citation Graph (0, 0)][DBLP] DATE, 2000, pp:99-0 [Conf]
- Michele Favalli, Marcello Dalpasso
An Evolutionary Approach to the Design of On-Chip Pseudorandom Test Pattern Generators. [Citation Graph (0, 0)][DBLP] DATE, 2002, pp:1122- [Conf]
- Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
Modeling of Broken Connections Faults in CMOS ICs. [Citation Graph (0, 0)][DBLP] EDAC-ETC-EUROASIC, 1994, pp:159-164 [Conf]
- Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Riccò
Parametric Bridging Fault Characterization for the Fault Simulation of Library-Based ICs. [Citation Graph (0, 0)][DBLP] ITC, 1992, pp:486-495 [Conf]
- Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
Analysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs. [Citation Graph (0, 0)][DBLP] ITC, 1992, pp:466-475 [Conf]
- Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
Analyss of Dynamic Effects of Resistive Bridging Faults in CMOS and BiCMOS Digital ICs. [Citation Graph (0, 0)][DBLP] ITC, 1993, pp:865-874 [Conf]
- Piero Olivo, Marcello Dalpasso
Self-Learning Signature Analysis for Non-Volatile Memory Testing. [Citation Graph (0, 0)][DBLP] ITC, 1996, pp:303-308 [Conf]
- Marcello Dalpasso, Giuseppe Lancia, Romeo Rizzi
The String Barcoding Problem is NP-Hard. [Citation Graph (0, 0)][DBLP] Comparative Genomics, 2005, pp:88-96 [Conf]
- Marcello Dalpasso, Michele Favalli, Piero Olivo
Test pattern generation for I/sub DDQ/: increasing test quality. [Citation Graph (0, 0)][DBLP] VTS, 1995, pp:304-309 [Conf]
- Marcello Dalpasso, Alessandro Bogliolo, Luca Benini
Virtual Simulation of Distributed IP-Based Designs. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 2002, v:19, n:5, pp:92-104 [Journal]
- Marcello Dalpasso, Michele Favalli
A method for increasing the IDDQ testability. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:10, pp:1186-1188 [Journal]
- Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Riccò
Fault simulation of parametric bridging faults in CMOS IC's. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:9, pp:1403-1410 [Journal]
- Michele Favalli, Marcello Dalpasso
Bridging fault modeling and simulation for deep submicron CMOS ICs. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:8, pp:941-953 [Journal]
- Michele Favalli, Marcello Dalpasso, Piero Olivo
Modeling and simulation of broken connections in CMOS IC's. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:7, pp:808-814 [Journal]
- Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
Analysis of resistive bridging fault detection in BiCMOS digital ICs. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1993, v:1, n:3, pp:342-355 [Journal]
High Quality Test Vectors for Bridging Faults in the Presence of IC's Parameters Variations. [Citation Graph (, )][DBLP]
Search in 0.004secs, Finished in 0.005secs
|