The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Li Ding 0002: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Li Ding 0002, Pinaki Mazumder
    A novel technique to improve noise immunity of CMOS dynamic logic circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:900-903 [Conf]
  2. Li Ding 0002, Pinaki Mazumder
    Optimal Transistor Tapering for High-Speed CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:708-715 [Conf]
  3. Li Ding 0002, Pinaki Mazumder
    Accurate Estimating Simultaneous Switching Noises by Using Application Specific Device Modeling. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:1038-1043 [Conf]
  4. Li Ding 0002, Pinaki Mazumder
    Modeling Noise Transfer Characteristic of Dynamic Logic Gates. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11114-11117 [Conf]
  5. Li Ding 0002, David Blaauw, Pinaki Mazumder
    Efficient crosstalk noise modeling using aggressor and tree reductions. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2002, pp:595-600 [Conf]
  6. Hui Zhang, Pinaki Mazumder, Li Ding 0002, Kyounghoon Yang
    Performance modeling of resonant tunneling based RAMs. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2003, pp:900-903 [Conf]
  7. Li Ding 0002, Pinaki Mazumder, N. Srinivas
    A dual-rail static edge-triggered latch. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2001, pp:645-648 [Conf]
  8. Qinwei Xu, Pinaki Mazumder, Li Ding 0002
    Novel macromodeling for on-chip RC/RLC interconnects. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:189-192 [Conf]
  9. Li Ding 0002, Pinaki Mazumder
    Modified long channel model for analytical study of DSM circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:541-544 [Conf]
  10. Li Ding 0002, Pinaki Mazumder, David Blaauw
    Crosstalk noise estimation using effective coupling capacitance. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:645-648 [Conf]
  11. Nahmsuk Oh, Li Ding, Alireza Kasnavi
    Fast Sequential Cell Noise Immunity Characterization Using Meta-stable Point of Feedback Loop. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:153-159 [Conf]
  12. Jindrich Zejda, Li Ding
    TBNM - Transistor-Level Boundary Model for Fast Gate-Level Noise Analysis of Macro Blocks. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:147-152 [Conf]
  13. Li Ding 0002, Pinaki Mazumder
    The Impact of Bit-Line Coupling and Ground Bounce on CMOS SRAM Performance. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:234-0 [Conf]
  14. Li Ding 0002, Pinaki Mazumder
    Dynamic Noise Margin: Definitions and Model. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:1001-0 [Conf]
  15. Li Ding 0002, David T. Blaauw, Pinaki Mazumder
    Accurate crosstalk noise modeling for early signal integrity analysis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:5, pp:627-634 [Journal]
  16. Li Ding 0002, Pinaki Mazumder
    On circuit techniques to improve noise immunity of CMOS dynamic logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:9, pp:910-925 [Journal]
  17. Li Ding 0002, Pinaki Mazumder
    Simultaneous switching noise analysis using application specific device modeling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:6, pp:1146-1152 [Journal]

  18. Worst-case aggressor-victim alignment with current-source driver models. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002