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Tom Eeckelaert:
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- Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen
Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. [Citation Graph (0, 0)][DBLP] DAC, 2006, pp:25-30 [Conf]
- Georges G. E. Gielen, Trent McConaghy, Tom Eeckelaert
Performance space modeling for hierarchical synthesis of analog integrated circuits. [Citation Graph (0, 0)][DBLP] DAC, 2005, pp:881-886 [Conf]
- Tom Eeckelaert, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
Generalized Posynomial Performance Modeling. [Citation Graph (0, 0)][DBLP] DATE, 2003, pp:10250-10255 [Conf]
- Tom Eeckelaert, Trent McConaghy, Georges G. E. Gielen
Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces. [Citation Graph (0, 0)][DBLP] DATE, 2005, pp:1070-1075 [Conf]
- Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen
CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming. [Citation Graph (0, 0)][DBLP] DATE, 2005, pp:1082-1087 [Conf]
- Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen
An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. [Citation Graph (0, 0)][DBLP] DATE, 2007, pp:81-86 [Conf]
- Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen
CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming [Citation Graph (0, 0)][DBLP] CoRR, 2007, v:0, n:, pp:- [Journal]
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