|
Search the dblp DataBase
Bernhard Eschermann:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Bernhard Eschermann, Hans-Joachim Wunderlich
A Unified Approach for the Synthesis of Self-Testable Finite State Machines. [Citation Graph (0, 0)][DBLP] DAC, 1991, pp:372-377 [Conf]
- Silke Draber, Bernhard Eschermann
Dependability Evaluation of a Computing System for Traction Control of Electrical Locomotives. [Citation Graph (0, 0)][DBLP] EDCC, 1996, pp:129-140 [Conf]
- Bernhard Eschermann
On Combining Off-Line BIST and On-Line Control Flow Checking. [Citation Graph (0, 0)][DBLP] FTCS, 1992, pp:298-305 [Conf]
- Bernhard Eschermann, Hubert D. Kirrmann
Fail-Safe On-Board Communication for Automatic Train Protection. [Citation Graph (0, 0)][DBLP] GI Jahrestagung, 1994, pp:356-363 [Conf]
- Juergen Froessl, Bernhard Eschermann
Module Generation for AND/XOR Fields (XPLAs). [Citation Graph (0, 0)][DBLP] ICCD, 1991, pp:26-29 [Conf]
- Bernhard Eschermann, Hans-Joachim Wunderlich
Emulation of Scan Paths in Sequential Circuit Synthesis. [Citation Graph (0, 0)][DBLP] Fault-Tolerant Computing Systems, 1991, pp:136-147 [Conf]
- Bernhard Eschermann
State Assignment for Hardwired VLSI Control Units. [Citation Graph (0, 0)][DBLP] ACM Comput. Surv., 1993, v:25, n:4, pp:415-436 [Journal]
- Bernhard Eschermann, Hans-Joachim Wunderlich
Optimized synthesis techniques for testable sequential circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:3, pp:301-312 [Journal]
Search in 0.001secs, Finished in 0.002secs
|