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Publications of Author

1. Laurent Fournier, Anatoly Koyfman, Moshe Levinger
   Developing an Architecture Validation Suite: Applicaiton to the PowerPC Architecture. [Citation Graph (0, 0)][DBLP]
   DAC, 1999, pp:189-194 [Conf]
   
2. Laurent Fournier, Yaron Arbetman, Moshe Levinger
   Functional Verification Methodology for Microprocessors Using the Genesys Test-Program Generator-Application to the x86 Microprocessors Family. [Citation Graph (0, 0)][DBLP]
   DATE, 1999, pp:434-441 [Conf]
   
3. Eyal Bin, Laurent Fournier
   Micro-Architecture Verification for Microprocessors. [Citation Graph (0, 0)][DBLP]
   MTV, 2004, pp:112-113 [Conf]
   
4. Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv
   Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:84-93 [Journal]
   
5. Hezi Azatchi, Laurent Fournier, Eitan Marcus, Shmuel Ur, Avi Ziv, Keren Zohar
   Advanced Analysis Techniques for Cross-Product Coverage. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1367-1379 [Journal]
   
6. Avi Ziv, Laurent Fournier
   Solving the generalized mask constraint for test generation of binary floating point add operation. [Citation Graph (0, 0)][DBLP]
   Theor. Comput. Sci., 2003, v:291, n:2, pp:183-201 [Journal]
   
7. Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jaeger, Ofer Peled
   A Framework for the Validation of Processor Architecture Compliance. [Citation Graph (0, 0)][DBLP]
   DAC, 2007, pp:902-905 [Conf]
   
8. 
   Automatic Boosting of Cross-Product Coverage Using Bayesian Networks. [Citation Graph (, )][DBLP]
   
   
9. 
   Using Virtual Coverage to Hit Hard-To-Reach Events. [Citation Graph (, )][DBLP]