The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Eric Gautrin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Patrice Frison, Eric Gautrin
    MADMACS: a new VLSI layout macro editor. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:654-658 [Conf]
  2. Joël Champeau, Luc Le Pape, Bernard Pottier, Stéphane Rubini, Eric Gautrin, Laurent Perraudeau
    Flexible Parallel FPGA-Based Architectures with ArMe. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:105-113 [Conf]
  3. François Charot, Patrice Frison, Eric Gautrin, Dominique Lavenier, Patrice Quinton, Charles Wagner
    From Equations to Hardware: Towards Systematic Mapping of Algorithms onto Parallel Architectures. [Citation Graph (0, 0)][DBLP]
    ICPIA, 1992, pp:1-15 [Conf]
  4. Eric Gautrin, Laurent Perraudeau
    MADMACS: an environment for the layout of regular arrays. [Citation Graph (0, 0)][DBLP]
    Synthesis for Control Dominated Circuits, 1992, pp:345-358 [Conf]
  5. Jean Marie Filloque, Eric Gautrin, Bernard Pottier
    Efficient Global Computations on a Processor Network with Programmable Logic. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1991, pp:69-82 [Conf]
  6. Patrice Frison, François Charot, Eric Gautrin, Dominique Lavenier, Patrice Quinton, Frédéric Raimbault, Charles Wagner
    From Equations to Hardware. Towards the Systematic Mapping of Algorithms onto Parallel Architectures. [Citation Graph (0, 0)][DBLP]
    IJPRAI, 1994, v:8, n:2, pp:417-438 [Journal]

Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002