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Nikhil Jayakumar: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan Choi
    A design approach for radiation-hard digital electronics. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:773-778 [Conf]
  2. Nikhil Jayakumar, Sandeep Dhar, Sunil P. Khatri
    A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:43-46 [Conf]
  3. Nikhil Jayakumar, Rajesh Garg, Bruce Gamache, Sunil P. Khatri
    A PLA based asynchronous micropipelining approach for subthreshold circuit design. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:419-424 [Conf]
  4. Nikhil Jayakumar, Sunil P. Khatri
    A variation tolerant subthreshold design approach. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:716-719 [Conf]
  5. Nikhil Jayakumar, Mitra Purandare, Fabio Somenzi
    Dos and don'ts of CTL state coverage estimation. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:292-295 [Conf]
  6. Rajesh Garg, Mario Sanchez, Kanupriya Gulati, Nikhil Jayakumar, Anshul Gupta, Sunil P. Khatri
    A design flow to optimize circuit delay by using standard cells and PLAs. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:217-222 [Conf]
  7. Nikhil Jayakumar, Sunil P. Khatri
    A metal and via maskset programmable VLSI design methodology using PLAs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2004, pp:590-594 [Conf]
  8. A. Kapoor, Nikhil Jayakumar, Sunil P. Khatri
    A novel clock distribution and dynamic de-skewing methodology. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2004, pp:626-631 [Conf]
  9. Ganesh Venkataraman, Nikhil Jayakumar, Jiang Hu, Peng Li, Sunil P. Khatri, Anand Rajaram, Patrick McGuinness, Charles J. Alpert
    Practical techniques to reduce skew and its variations in buffered clock networks. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:592-596 [Conf]
  10. Nikhil Jayakumar, Sunil P. Khatri, Kanupriya Gulati, Alexander Sprintson
    Network coding for routability improvement in VLSI. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:820-823 [Conf]
  11. Seraj Ahmad, Nikhil Jayakumar, Vijay Balasubramanian, Edward Hursey, Sunil P. Khatri, Rabi N. Mahapatra
    X-Routing using Two Manhattan Route Instances. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:45-52 [Conf]
  12. Nikhil Jayakumar, Sunil P. Khatri
    Minimum Energy Near-threshold Network of PLA based Design. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:399-404 [Conf]
  13. Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri
    An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2005, pp:111-114 [Conf]
  14. Nikhil Jayakumar, Sunil P. Khatri
    An ASIC design methodology with predictably low leakage, using leakage-immune standard cells. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:128-133 [Conf]
  15. Edward Hursey, Nikhil Jayakumar, Sunil P. Khatri
    Non-Manhattan Routing Using a Manhattan Router. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:445-450 [Conf]
  16. Nikhil Jayakumar, Sunil P. Khatri
    An algorithm to minimize leakage through simultaneous input vector control and circuit modification. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:618-623 [Conf]
  17. Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri
    A Structured ASIC Design Approach Using Pass Transistor Logic. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:1787-1790 [Conf]
  18. Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri
    A probabilistic method to determine the minimum leakage vector for combinational designs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  19. Nikhil Jayakumar, Sunil P. Khatri
    A Predictably Low-Leakage ASIC Design Style. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:3, pp:276-285 [Journal]

  20. On the Improvement of Statistical Static Timing Analysis. [Citation Graph (, )][DBLP]


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