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Publications of Author

1. Dipanjan Gope, Swagato Chakraborty, Vikram Jandhyala
   A fast parasitic extractor based on low-rank multilevel matrix compression for conductor and dielectric modeling in microelectronics and MEMS. [Citation Graph (0, 0)][DBLP]
   DAC, 2004, pp:794-799 [Conf]
   
2. Dipanjan Gope, Indranil Chowdhury, Vikram Jandhyala
   DiMES: multilevel fast direct solver based on multipole expansions for parasitic extraction of massively coupled 3D microelectronic structures. [Citation Graph (0, 0)][DBLP]
   DAC, 2005, pp:159-162 [Conf]
   
3. Chuanyi Yang, Swagato Chakraborty, Dipanjan Gope, Vikram Jandhyala
   A parallel low-rank multilevel matrix compression algorithm for parasitic extraction of electrically large structures. [Citation Graph (0, 0)][DBLP]
   DAC, 2006, pp:1053-1056 [Conf]
   
4. Vikram Jandhyala, Yong Wang, Dipanjan Gope, C.-J. Richard Shi
   Coupled Electromagnetic-Circuit Simulation of Arbitrarily-Shaped Conducting Structures Using Triangular Meshes. [Citation Graph (0, 0)][DBLP]
   ISQED, 2002, pp:38-42 [Conf]
   
5. Dipanjan Gope, Vikram Jandhyala
   Oct-tree-based multilevel low-rank decomposition algorithm for rapid 3-D parasitic extraction. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1575-1580 [Journal]
   
6. Dipanjan Gope, Albert E. Ruehli, Vikram Jandhyala
   Speeding Up PEEC Partial Inductance Computations Using a QR-Based Algorithm. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2007, v:15, n:1, pp:60-68 [Journal]