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Publications of Author

1. Jonathan W. Greene, Vwani P. Roychowdhury, Sinan Kaptanoglu, Abbas El Gamal
   Segmented Channel Routing. [Citation Graph (0, 0)][DBLP]
   DAC, 1990, pp:567-572 [Conf]
   
2. Sinan Kaptanoglu, Greg Bakker, Arun Kundu, Ivan Corneillet, Ben Ting
   A New High Density and Very Low Cost Reprogrammable FPGA Architecture. [Citation Graph (0, 0)][DBLP]
   FPGA, 1999, pp:3-12 [Conf]
   
3. Sinan Kaptanoglu, John East, Tim Garverick, Scott Hauck, Tavana Tavana, Steven Trimberger, Ronnie Vasishta
   Is marriage in the cards for programmable logic, microprocessors and ASICs? [Citation Graph (0, 0)][DBLP]
   FPGA, 2001, pp:111- [Conf]
   
4. Jonathan Rose, Sinan Kaptanoglu, Clive McCarthy, Rob Smith, Sandip Vij, Steve Taylor
   Constraints from Hell: How to Tell Makes a Good FPGA (Panel). [Citation Graph (0, 0)][DBLP]
   FPGA, 1998, pp:117-119 [Conf]
   
5. Wenyi Feng, Sinan Kaptanoglu
   Designing efficient input interconnect blocks for LUT clusters using counting and entropy. [Citation Graph (0, 0)][DBLP]
   FPGA, 2007, pp:23-32 [Conf]
   
6. Michael Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini
   Improving FPGA Performance and Area Using an Adaptive Logic Module. [Citation Graph (0, 0)][DBLP]
   FPL, 2004, pp:135-144 [Conf]
   
7. Sinan Kaptanoglu
   System LSI Implementation Fabrics for the Future (special panel discussion). [Citation Graph (0, 0)][DBLP]
   ICCD, 2003, pp:410-0 [Conf]
   
8. John Valainis, Sinan Kaptanoglu, Erwin Liu, Roberto Suaya
   Two-dimensional IC layout compaction based on topological design rule checking. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:3, pp:260-275 [Journal]