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Sridhar Narayanan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sudheendra Hangal, Naveen Chandra, Sridhar Narayanan, Sandeep Chakravorty
    IODINE: a tool to automatically infer dynamic invariants for hardware designs. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:775-778 [Conf]
  2. Sridhar Narayanan, Melvin A. Breuer
    Reconfigurable scan chains: a novel approach to reduce test application time. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:710-715 [Conf]
  3. Sridhar Narayanan, Rajesh Gupta, Melvin A. Breuer
    Configuring multiple scan chains for minimum test time. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:4-8 [Conf]
  4. Sudheendra Hangal, Durgam Vahia, Chaiyasit Manovit, Juin-Yeu Joseph Lu, Sridhar Narayanan
    TSOtool: A Program for Verifying Memory Systems Using the Memory Consistency Model. [Citation Graph (0, 0)][DBLP]
    ISCA, 2004, pp:114-123 [Conf]
  5. Marc E. Levitt, Srinivas Nori, Sridhar Narayanan, G. P. Grewal, Lynn Youngs, Anjali Jones, Greg Billus, Siva Paramanandam
    Testability, Debuggability, and Manufacturability Features of the UltraSPARCTM-I Microprocessor. [Citation Graph (0, 0)][DBLP]
    ITC, 1995, pp:157-166 [Conf]
  6. Sridhar Narayanan, Ashutosh Das
    An Efficient Scheme to Diagnose Scan Chains. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:704-713 [Conf]
  7. Sridhar Narayanan, Charles Njinda, Melvin A. Breuer
    Optimal Sequencing of Scan Registers. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:293-302 [Conf]
  8. Sridhar Narayanan, Melvin A. Breuer
    Asynchronous multiple scan chain. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:270-276 [Conf]
  9. Sridhar Narayanan, Rajesh Gupta, Melvin A. Breuer
    Optimal Configuring of Multiple Scan Chains. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:9, pp:1121-1131 [Journal]
  10. Sridhar Narayanan, Melvin A. Breuer
    Reconfiguration techniques for a single scan chain. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:6, pp:750-765 [Journal]

  11. A fault diagnosis methodology for the UltraSPARCTM-I microprocessor. [Citation Graph (, )][DBLP]

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