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Thomas H. Lee:
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Publications of Author
- Maria del Mar Hershenson, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee
Optimization of Inductor Circuits via Geometric Programming. [Citation Graph (0, 0)][DBLP] DAC, 1999, pp:994-998 [Conf]
- Maria del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee
GPCAD: a tool for CMOS op-amp synthesis. [Citation Graph (0, 0)][DBLP] ICCAD, 1998, pp:296-303 [Conf]
- Maria del Mar Hershenson, Ali Hajimiri, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee
Design and optimization of LC oscillators. [Citation Graph (0, 0)][DBLP] ICCAD, 1999, pp:65-69 [Conf]
- Tamara I. Ahrens, Thomas H. Lee
A 1.4-GHz 3-mW CMOS LC low phase noise VCO using tapped bond wire inductances. [Citation Graph (0, 0)][DBLP] ISLPED, 1998, pp:16-19 [Conf]
- Rafael J. Betancourt-Zamora, Thomas H. Lee
CMOS VCOs for frequency synthesis in wireless biotelemetry. [Citation Graph (0, 0)][DBLP] ISLPED, 1998, pp:91-94 [Conf]
- James Montanaro, Richard T. Witek, Krishna Anne, Andrew J. Black, Elizabeth M. Cooper, Daniel W. Dobberpuhl, Paul M. Donahue, Jim Eno, Gregory W. Hoeppner, David Kruckemyer, Thomas H. Lee, Peter C. M. Lin, Liam Madden, Daniel Murray, Mark H. Pearce, Sribalan Santhanam, Kathryn J. Snyder, Ray Stephany, Stephen C. Thierauf
A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor. [Citation Graph (0, 0)][DBLP] Digital Technical Journal, 1997, v:9, n:1, pp:- [Journal]
- Maria del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee
Optimal design of a CMOS op-amp via geometric programming. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:1, pp:1-21 [Journal]
- Reza Navid, Thomas H. Lee, Robert W. Dutton
A Circuit-Based Noise Parameter Extraction Technique for MOSFETs. [Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:3347-3350 [Conf]
A low-overhead fault tolerance scheme for TSV-based 3D network on chip links. [Citation Graph (, )][DBLP]
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