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Tsung-Yi Ho: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-Jie Chen
    Multilevel full-chip routing for the X-based architecture. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:597-602 [Conf]
  2. Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen, D. T. Lee
    A Fast Crosstalk- and Performance-Driven Multilevel Routing System. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:382-387 [Conf]
  3. Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen
    Multilevel routing with antenna avoidance. [Citation Graph (0, 0)][DBLP]
    ISPD, 2004, pp:34-40 [Conf]
  4. Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen
    Multilevel routing with jumper insertion for antenna avoidance. [Citation Graph (0, 0)][DBLP]
    Integration, 2006, v:39, n:4, pp:420-432 [Journal]
  5. Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen, D. T. Lee
    Crosstalk- and performance-driven multilevel full-chip routing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:6, pp:869-878 [Journal]

  6. Bus-pin-aware bus-driven floorplanning. [Citation Graph (, )][DBLP]


  7. A contamination aware droplet routing algorithm for digital microfluidic biochips. [Citation Graph (, )][DBLP]


  8. A two-stage ILP-based droplet routing algorithm for pin-constrained digital microfluidic biochips. [Citation Graph (, )][DBLP]


  9. A Performance-Driven Multilevel Framework for the X-Based Full-Chip Router. [Citation Graph (, )][DBLP]


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