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Yatin Vasant Hoskote: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yatin Vasant Hoskote, Timothy Kam, Pei-Hsin Ho, Xudong Zhao
    Coverage Estimation for Symbolic Model Checking. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:300-305 [Conf]
  2. Yirng-An Chen, Edmund M. Clarke, Pei-Hsin Ho, Yatin Vasant Hoskote, Timothy Kam, Manpreet Khaira, John W. O'Leary, Xudong Zhao
    Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1996, pp:19-33 [Conf]
  3. Yatin Vasant Hoskote, Jacob A. Abraham, Donald S. Fussell
    Automated verification of temporal properties specified as state machines in VHDL. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1995, pp:100-105 [Conf]
  4. Yatin Vasant Hoskote, Dinos Moundanos, Jacob A. Abraham
    Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors. [Citation Graph (0, 0)][DBLP]
    ICCD, 1995, pp:532-537 [Conf]
  5. Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote
    A Unified Framework for Design Validation and Manufacturing Test. [Citation Graph (0, 0)][DBLP]
    ITC, 1996, pp:875-884 [Conf]
  6. Yatin Vasant Hoskote, John Moondanos, Jacob A. Abraham, Donald S. Fussell
    Verification of Circuits Described in VHDL through Extraction of Design Intent. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1994, pp:417-420 [Conf]
  7. Ashok Balivada, Yatin Vasant Hoskote, Jacob A. Abraham
    Verification of transient response of linear analog circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:42-47 [Conf]
  8. Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote
    Abstraction Techniques for Validation Coverage Analysis and Test Generation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1998, v:47, n:1, pp:2-14 [Journal]
  9. V. S. S. Nair, Yatin Vasant Hoskote, Jacob A. Abraham
    Probabilistic Evaluation of On-Line Checks in Fault-Tolerant Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:5, pp:532-541 [Journal]
  10. Yatin Vasant Hoskote, Jacob A. Abraham, Donald S. Fussell, John Moondanos
    Automatic verification of implementations of large circuits against HDL specifications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:3, pp:217-228 [Journal]

  11. Guest Editors' Introduction: Tackling Key Problems in NoCs. [Citation Graph (, )][DBLP]


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