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Brad L. Hutchings: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Brad L. Hutchings, Brent E. Nelson
    Using general-purpose programming languages for FPGA design. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:561-566 [Conf]
  2. Peter Bellows, Brad L. Hutchings
    JHDL - An HDL for Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:175-0 [Conf]
  3. Paul Graham, Brad L. Hutchings, Brent E. Nelson
    Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings. [Citation Graph (0, 0)][DBLP]
    FCCM, 2000, pp:305-306 [Conf]
  4. James D. Hadley, Brad L. Hutchings
    Design methodologies for partially reconfigured systems. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:78-84 [Conf]
  5. K. Scott Hemmert, Justin L. Tripp, Brad L. Hutchings, Preston A. Jackson
    Source Level Debugger for the Sea Cucumber Synthesizing Compiler. [Citation Graph (0, 0)][DBLP]
    FCCM, 2003, pp:228-0 [Conf]
  6. Brad L. Hutchings, Peter Bellows, Joseph Hawkins, K. Scott Hemmert, Brent E. Nelson, Mike Rytting
    A CAD Suite for High-Performance FPGA Design. [Citation Graph (0, 0)][DBLP]
    FCCM, 1999, pp:12-24 [Conf]
  7. Brad L. Hutchings, R. Franklin, D. Carver
    Assisting Network Intrusion Detection with Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:111-120 [Conf]
  8. Preston A. Jackson, Brad L. Hutchings, Justin L. Tripp
    Simulation and Synthesis of CSP-based Interprocess Communication. [Citation Graph (0, 0)][DBLP]
    FCCM, 2003, pp:218-227 [Conf]
  9. Michael Rencher, Brad L. Hutchings
    Automated target recognition on SPLASH 2. [Citation Graph (0, 0)][DBLP]
    FCCM, 1997, pp:192-200 [Conf]
  10. Michael J. Wirthlin, Brad L. Hutchings
    A dynamic instruction set computer. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:99-109 [Conf]
  11. Anthony L. Slade, Brent E. Nelson, Brad L. Hutchings
    Reconfigurable Computing Application Frameworks. [Citation Graph (0, 0)][DBLP]
    FCCM, 2003, pp:251-0 [Conf]
  12. André DeHon, Brad L. Hutchings, Daryl Rudusky, James Hwang, Nikhil, Salil Raje, Adrian Stoica
    What is the right model for programming and using modern FPGAs? [Citation Graph (0, 0)][DBLP]
    FPGA, 2004, pp:119- [Conf]
  13. Alan Marshall, Tony Stansfield, Igor Kostarnov, Jean Vuillemin, Brad L. Hutchings
    A Reconfigurable Arithmetic Array for Multimedia Application. [Citation Graph (0, 0)][DBLP]
    FPGA, 1999, pp:135-143 [Conf]
  14. Michael J. Wirthlin, Brad L. Hutchings
    Sequencing Run-Time Reconfigured Hardware with Software. [Citation Graph (0, 0)][DBLP]
    FPGA, 1996, pp:122-128 [Conf]
  15. Michael J. Wirthlin, Brad L. Hutchings
    Improving Functional Density Through Run-Time Constant Propagation. [Citation Graph (0, 0)][DBLP]
    FPGA, 1997, pp:86-92 [Conf]
  16. Brad L. Hutchings
    Exploiting reconfigurability through domain-specific systems. [Citation Graph (0, 0)][DBLP]
    FPL, 1997, pp:193-202 [Conf]
  17. Brad L. Hutchings, Michael J. Wirthlin
    Implementation Approaches for Reconfigurable Logic Applications. [Citation Graph (0, 0)][DBLP]
    FPL, 1995, pp:419-428 [Conf]
  18. Wesley J. Landaker, Michael J. Wirthlin, Brad L. Hutchings
    Multitasking Hardware on the SLAAC1-V Reconfigurable Computing System. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:806-815 [Conf]
  19. Russell J. Petersen, Brad L. Hutchings
    An Assessment of the Suitability of FPGA-Based Systems for Use in Digital Signal Processing. [Citation Graph (0, 0)][DBLP]
    FPL, 1995, pp:293-302 [Conf]
  20. Justin L. Tripp, Preston A. Jackson, Brad L. Hutchings
    Sea Cucumber: A Synthesizing Compiler for FPGAs. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:875-885 [Conf]
  21. Timothy Wheeler, Paul Graham, Brent E. Nelson, Brad L. Hutchings
    Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. [Citation Graph (0, 0)][DBLP]
    FPL, 2001, pp:483-492 [Conf]
  22. Michael J. Wirthlin, Brad L. Hutchings, Carl Worth
    Synthesizing RTL Hardware from Java Byte Codes. [Citation Graph (0, 0)][DBLP]
    FPL, 2001, pp:123-132 [Conf]
  23. Brad L. Hutchings
    ASICs, Processors, and Configurable Computing. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1997, pp:719-719 [Conf]
  24. Brad L. Hutchings, Tony M. Carter
    High-Speed Circuit Design: CAD Tools and Computational Challenges. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:26-35 [Conf]
  25. Brad L. Hutchings, A. R. Grahn, Russell J. Petersen
    Multiple-Layer Cross-Field Ultrasonic Tactile Sensor. [Citation Graph (0, 0)][DBLP]
    ICRA, 1994, pp:2522-2528 [Conf]
  26. David Eppstein, Marshall W. Bern, Brad L. Hutchings
    Algorithms for Coloring Quadtrees. [Citation Graph (0, 0)][DBLP]
    Algorithmica, 2002, v:32, n:1, pp:87-94 [Journal]
  27. David Eppstein, Marshall W. Bern, Brad L. Hutchings
    Algorithms for Coloring Quadtrees [Citation Graph (0, 0)][DBLP]
    CoRR, 1999, v:0, n:, pp:- [Journal]
  28. Brad L. Hutchings, Brent E. Nelson, Michael J. Wirthlin
    Designing and Debugging Custom Computing Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2000, v:17, n:1, pp:20-28 [Journal]
  29. Michael J. Wirthlin, Brad L. Hutchings
    Improving functional density using run-time circuit reconfiguration [FPGAs]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:2, pp:247-256 [Journal]
  30. Brad L. Hutchings, Brent E. Nelson
    Unifying simulation and execution in a design environment for FPGA systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2001, v:9, n:1, pp:201-205 [Journal]

  31. Design Productivity for Configurable Computing. [Citation Graph (, )][DBLP]


  32. Optical Flow on the Ambric Massively Parallel Processor Array (MPPA). [Citation Graph (, )][DBLP]


  33. Comparing fine-grained performance on the Ambric MPPA against an FPGA. [Citation Graph (, )][DBLP]


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